Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=f64ee87614e80ca270de0b80c5164ab05f4f1d98
Commit:     f64ee87614e80ca270de0b80c5164ab05f4f1d98
Parent:     7960a1d02b00fd5dfa5c2d9b957e4e5f6ec23997
Author:     Paul Mundt <[EMAIL PROTECTED]>
AuthorDate: Fri Nov 9 13:34:36 2007 +0900
Committer:  Paul Mundt <[EMAIL PROTECTED]>
CommitDate: Mon Jan 28 13:18:40 2008 +0900

    sh: Split out irqflags.h in to _32 and _64 variants.
    
    Signed-off-by: Paul Mundt <[EMAIL PROTECTED]>
---
 include/asm-sh/cpu-sh5/registers.h |  106 ++++++++++++++++++++++++
 include/asm-sh/irqflags.h          |  157 ++++++++----------------------------
 include/asm-sh/irqflags_32.h       |   99 ++++++++++++++++++++++
 include/asm-sh/irqflags_64.h       |   85 +++++++++++++++++++
 include/asm-sh64/registers.h       |  106 ------------------------
 5 files changed, 324 insertions(+), 229 deletions(-)

diff --git a/include/asm-sh/cpu-sh5/registers.h 
b/include/asm-sh/cpu-sh5/registers.h
new file mode 100644
index 0000000..7eec666
--- /dev/null
+++ b/include/asm-sh/cpu-sh5/registers.h
@@ -0,0 +1,106 @@
+#ifndef __ASM_SH64_REGISTERS_H
+#define __ASM_SH64_REGISTERS_H
+
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * include/asm-sh64/registers.h
+ *
+ * Copyright (C) 2000, 2001  Paolo Alberelli
+ * Copyright (C) 2004  Richard Curnow
+ */
+
+#ifdef __ASSEMBLY__
+/* =====================================================================
+**
+** Section 1: acts on assembly sources pre-processed by GPP ( <source.S>).
+**           Assigns symbolic names to control & target registers.
+*/
+
+/*
+ * Define some useful aliases for control registers.
+ */
+#define SR     cr0
+#define SSR    cr1
+#define PSSR   cr2
+                       /* cr3 UNDEFINED */
+#define INTEVT cr4
+#define EXPEVT cr5
+#define PEXPEVT        cr6
+#define TRA    cr7
+#define SPC    cr8
+#define PSPC   cr9
+#define RESVEC cr10
+#define VBR    cr11
+                       /* cr12 UNDEFINED */
+#define TEA    cr13
+                       /* cr14-cr15 UNDEFINED */
+#define DCR    cr16
+#define KCR0   cr17
+#define KCR1   cr18
+                       /* cr19-cr31 UNDEFINED */
+                       /* cr32-cr61 RESERVED */
+#define CTC    cr62
+#define USR    cr63
+
+/*
+ * ABI dependent registers (general purpose set)
+ */
+#define RET    r2
+#define ARG1   r2
+#define ARG2   r3
+#define ARG3   r4
+#define ARG4   r5
+#define ARG5   r6
+#define ARG6   r7
+#define SP     r15
+#define LINK   r18
+#define ZERO   r63
+
+/*
+ * Status register defines: used only by assembly sources (and
+ *                         syntax independednt)
+ */
+#define SR_RESET_VAL   0x0000000050008000
+#define SR_HARMLESS    0x00000000500080f0      /* Write ignores for most */
+#define SR_ENABLE_FPU  0xffffffffffff7fff      /* AND with this */
+
+#if defined (CONFIG_SH64_SR_WATCH)
+#define SR_ENABLE_MMU  0x0000000084000000      /* OR with this */
+#else
+#define SR_ENABLE_MMU  0x0000000080000000      /* OR with this */
+#endif
+
+#define SR_UNBLOCK_EXC 0xffffffffefffffff      /* AND with this */
+#define SR_BLOCK_EXC   0x0000000010000000      /* OR with this */
+
+#else  /* Not __ASSEMBLY__ syntax */
+
+/*
+** Stringify reg. name
+*/
+#define __str(x)  #x
+
+/* Stringify control register names for use in inline assembly */
+#define __SR __str(SR)
+#define __SSR __str(SSR)
+#define __PSSR __str(PSSR)
+#define __INTEVT __str(INTEVT)
+#define __EXPEVT __str(EXPEVT)
+#define __PEXPEVT __str(PEXPEVT)
+#define __TRA __str(TRA)
+#define __SPC __str(SPC)
+#define __PSPC __str(PSPC)
+#define __RESVEC __str(RESVEC)
+#define __VBR __str(VBR)
+#define __TEA __str(TEA)
+#define __DCR __str(DCR)
+#define __KCR0 __str(KCR0)
+#define __KCR1 __str(KCR1)
+#define __CTC __str(CTC)
+#define __USR __str(USR)
+
+#endif /* __ASSEMBLY__ */
+#endif /* __ASM_SH64_REGISTERS_H */
diff --git a/include/asm-sh/irqflags.h b/include/asm-sh/irqflags.h
dissimilarity index 71%
index 9dedc1b..46e71da 100644
--- a/include/asm-sh/irqflags.h
+++ b/include/asm-sh/irqflags.h
@@ -1,123 +1,34 @@
-#ifndef __ASM_SH_IRQFLAGS_H
-#define __ASM_SH_IRQFLAGS_H
-
-static inline void raw_local_irq_enable(void)
-{
-       unsigned long __dummy0, __dummy1;
-
-       __asm__ __volatile__ (
-               "stc    sr, %0\n\t"
-               "and    %1, %0\n\t"
-#ifdef CONFIG_CPU_HAS_SR_RB
-               "stc    r6_bank, %1\n\t"
-               "or     %1, %0\n\t"
-#endif
-               "ldc    %0, sr\n\t"
-               : "=&r" (__dummy0), "=r" (__dummy1)
-               : "1" (~0x000000f0)
-               : "memory"
-       );
-}
-
-static inline void raw_local_irq_disable(void)
-{
-       unsigned long flags;
-
-       __asm__ __volatile__ (
-               "stc    sr, %0\n\t"
-               "or     #0xf0, %0\n\t"
-               "ldc    %0, sr\n\t"
-               : "=&z" (flags)
-               : /* no inputs */
-               : "memory"
-       );
-}
-
-static inline void set_bl_bit(void)
-{
-       unsigned long __dummy0, __dummy1;
-
-       __asm__ __volatile__ (
-               "stc    sr, %0\n\t"
-               "or     %2, %0\n\t"
-               "and    %3, %0\n\t"
-               "ldc    %0, sr\n\t"
-               : "=&r" (__dummy0), "=r" (__dummy1)
-               : "r" (0x10000000), "r" (0xffffff0f)
-               : "memory"
-       );
-}
-
-static inline void clear_bl_bit(void)
-{
-       unsigned long __dummy0, __dummy1;
-
-       __asm__ __volatile__ (
-               "stc    sr, %0\n\t"
-               "and    %2, %0\n\t"
-               "ldc    %0, sr\n\t"
-               : "=&r" (__dummy0), "=r" (__dummy1)
-               : "1" (~0x10000000)
-               : "memory"
-       );
-}
-
-static inline unsigned long __raw_local_save_flags(void)
-{
-       unsigned long flags;
-
-       __asm__ __volatile__ (
-               "stc    sr, %0\n\t"
-               "and    #0xf0, %0\n\t"
-               : "=&z" (flags)
-               : /* no inputs */
-               : "memory"
-       );
-
-       return flags;
-}
-
-#define raw_local_save_flags(flags) \
-               do { (flags) = __raw_local_save_flags(); } while (0)
-
-static inline int raw_irqs_disabled_flags(unsigned long flags)
-{
-       return (flags != 0);
-}
-
-static inline int raw_irqs_disabled(void)
-{
-       unsigned long flags = __raw_local_save_flags();
-
-       return raw_irqs_disabled_flags(flags);
-}
-
-static inline unsigned long __raw_local_irq_save(void)
-{
-       unsigned long flags, __dummy;
-
-       __asm__ __volatile__ (
-               "stc    sr, %1\n\t"
-               "mov    %1, %0\n\t"
-               "or     #0xf0, %0\n\t"
-               "ldc    %0, sr\n\t"
-               "mov    %1, %0\n\t"
-               "and    #0xf0, %0\n\t"
-               : "=&z" (flags), "=&r" (__dummy)
-               : /* no inputs */
-               : "memory"
-       );
-
-       return flags;
-}
-
-#define raw_local_irq_save(flags) \
-               do { (flags) = __raw_local_irq_save(); } while (0)
-
-static inline void raw_local_irq_restore(unsigned long flags)
-{
-       if ((flags & 0xf0) != 0xf0)
-               raw_local_irq_enable();
-}
-
-#endif /* __ASM_SH_IRQFLAGS_H */
+#ifndef __ASM_SH_IRQFLAGS_H
+#define __ASM_SH_IRQFLAGS_H
+
+#ifdef CONFIG_SUPERH32
+#include "irqflags_32.h"
+#else
+#include "irqflags_64.h"
+#endif
+
+#define raw_local_save_flags(flags) \
+               do { (flags) = __raw_local_save_flags(); } while (0)
+
+static inline int raw_irqs_disabled_flags(unsigned long flags)
+{
+       return (flags != 0);
+}
+
+static inline int raw_irqs_disabled(void)
+{
+       unsigned long flags = __raw_local_save_flags();
+
+       return raw_irqs_disabled_flags(flags);
+}
+
+#define raw_local_irq_save(flags) \
+               do { (flags) = __raw_local_irq_save(); } while (0)
+
+static inline void raw_local_irq_restore(unsigned long flags)
+{
+       if ((flags & 0xf0) != 0xf0)
+               raw_local_irq_enable();
+}
+
+#endif /* __ASM_SH_IRQFLAGS_H */
diff --git a/include/asm-sh/irqflags_32.h b/include/asm-sh/irqflags_32.h
new file mode 100644
index 0000000..60218f5
--- /dev/null
+++ b/include/asm-sh/irqflags_32.h
@@ -0,0 +1,99 @@
+#ifndef __ASM_SH_IRQFLAGS_32_H
+#define __ASM_SH_IRQFLAGS_32_H
+
+static inline void raw_local_irq_enable(void)
+{
+       unsigned long __dummy0, __dummy1;
+
+       __asm__ __volatile__ (
+               "stc    sr, %0\n\t"
+               "and    %1, %0\n\t"
+#ifdef CONFIG_CPU_HAS_SR_RB
+               "stc    r6_bank, %1\n\t"
+               "or     %1, %0\n\t"
+#endif
+               "ldc    %0, sr\n\t"
+               : "=&r" (__dummy0), "=r" (__dummy1)
+               : "1" (~0x000000f0)
+               : "memory"
+       );
+}
+
+static inline void raw_local_irq_disable(void)
+{
+       unsigned long flags;
+
+       __asm__ __volatile__ (
+               "stc    sr, %0\n\t"
+               "or     #0xf0, %0\n\t"
+               "ldc    %0, sr\n\t"
+               : "=&z" (flags)
+               : /* no inputs */
+               : "memory"
+       );
+}
+
+static inline void set_bl_bit(void)
+{
+       unsigned long __dummy0, __dummy1;
+
+       __asm__ __volatile__ (
+               "stc    sr, %0\n\t"
+               "or     %2, %0\n\t"
+               "and    %3, %0\n\t"
+               "ldc    %0, sr\n\t"
+               : "=&r" (__dummy0), "=r" (__dummy1)
+               : "r" (0x10000000), "r" (0xffffff0f)
+               : "memory"
+       );
+}
+
+static inline void clear_bl_bit(void)
+{
+       unsigned long __dummy0, __dummy1;
+
+       __asm__ __volatile__ (
+               "stc    sr, %0\n\t"
+               "and    %2, %0\n\t"
+               "ldc    %0, sr\n\t"
+               : "=&r" (__dummy0), "=r" (__dummy1)
+               : "1" (~0x10000000)
+               : "memory"
+       );
+}
+
+static inline unsigned long __raw_local_save_flags(void)
+{
+       unsigned long flags;
+
+       __asm__ __volatile__ (
+               "stc    sr, %0\n\t"
+               "and    #0xf0, %0\n\t"
+               : "=&z" (flags)
+               : /* no inputs */
+               : "memory"
+       );
+
+       return flags;
+}
+
+static inline unsigned long __raw_local_irq_save(void)
+{
+       unsigned long flags, __dummy;
+
+       __asm__ __volatile__ (
+               "stc    sr, %1\n\t"
+               "mov    %1, %0\n\t"
+               "or     #0xf0, %0\n\t"
+               "ldc    %0, sr\n\t"
+               "mov    %1, %0\n\t"
+               "and    #0xf0, %0\n\t"
+               : "=&z" (flags), "=&r" (__dummy)
+               : /* no inputs */
+               : "memory"
+       );
+
+       return flags;
+}
+
+#endif /* __ASM_SH_IRQFLAGS_32_H */
diff --git a/include/asm-sh/irqflags_64.h b/include/asm-sh/irqflags_64.h
new file mode 100644
index 0000000..4f6b8a5
--- /dev/null
+++ b/include/asm-sh/irqflags_64.h
@@ -0,0 +1,85 @@
+#ifndef __ASM_SH_IRQFLAGS_64_H
+#define __ASM_SH_IRQFLAGS_64_H
+
+#include <asm/cpu/registers.h>
+
+#define SR_MASK_LL     0x00000000000000f0LL
+#define SR_BL_LL       0x0000000010000000LL
+
+static inline void raw_local_irq_enable(void)
+{
+       unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL;
+
+       __asm__ __volatile__("getcon    " __SR ", %0\n\t"
+                            "and       %0, %1, %0\n\t"
+                            "putcon    %0, " __SR "\n\t"
+                            : "=&r" (__dummy0)
+                            : "r" (__dummy1));
+}
+
+static inline void raw_local_irq_disable(void)
+{
+       unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
+
+       __asm__ __volatile__("getcon    " __SR ", %0\n\t"
+                            "or        %0, %1, %0\n\t"
+                            "putcon    %0, " __SR "\n\t"
+                            : "=&r" (__dummy0)
+                            : "r" (__dummy1));
+}
+
+static inline void set_bl_bit(void)
+{
+       unsigned long long __dummy0, __dummy1 = SR_BL_LL;
+
+       __asm__ __volatile__("getcon    " __SR ", %0\n\t"
+                            "or        %0, %1, %0\n\t"
+                            "putcon    %0, " __SR "\n\t"
+                            : "=&r" (__dummy0)
+                            : "r" (__dummy1));
+
+}
+
+static inline void clear_bl_bit(void)
+{
+       unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
+
+       __asm__ __volatile__("getcon    " __SR ", %0\n\t"
+                            "and       %0, %1, %0\n\t"
+                            "putcon    %0, " __SR "\n\t"
+                            : "=&r" (__dummy0)
+                            : "r" (__dummy1));
+}
+
+static inline unsigned long __raw_local_save_flags(void)
+{
+       unsigned long long __dummy = SR_MASK_LL;
+       unsigned long flags;
+
+       __asm__ __volatile__ (
+               "getcon " __SR ", %0\n\t"
+               "and    %0, %1, %0"
+               : "=&r" (flags)
+               : "r" (__dummy));
+
+       return flags;
+}
+
+static inline unsigned long __raw_local_irq_save(void)
+{
+       unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
+       unsigned long flags;
+
+       __asm__ __volatile__ (
+               "getcon " __SR ", %1\n\t"
+               "or     %1, r63, %0\n\t"
+               "or     %1, %2, %1\n\t"
+               "putcon %1, " __SR "\n\t"
+               "and    %0, %2, %0"
+               : "=&r" (flags), "=&r" (__dummy0)
+               : "r" (__dummy1));
+
+       return flags;
+}
+
+#endif /* __ASM_SH_IRQFLAGS_64_H */
diff --git a/include/asm-sh64/registers.h b/include/asm-sh64/registers.h
deleted file mode 100644
index 7eec666..0000000
--- a/include/asm-sh64/registers.h
+++ /dev/null
@@ -1,106 +0,0 @@
-#ifndef __ASM_SH64_REGISTERS_H
-#define __ASM_SH64_REGISTERS_H
-
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * include/asm-sh64/registers.h
- *
- * Copyright (C) 2000, 2001  Paolo Alberelli
- * Copyright (C) 2004  Richard Curnow
- */
-
-#ifdef __ASSEMBLY__
-/* =====================================================================
-**
-** Section 1: acts on assembly sources pre-processed by GPP ( <source.S>).
-**           Assigns symbolic names to control & target registers.
-*/
-
-/*
- * Define some useful aliases for control registers.
- */
-#define SR     cr0
-#define SSR    cr1
-#define PSSR   cr2
-                       /* cr3 UNDEFINED */
-#define INTEVT cr4
-#define EXPEVT cr5
-#define PEXPEVT        cr6
-#define TRA    cr7
-#define SPC    cr8
-#define PSPC   cr9
-#define RESVEC cr10
-#define VBR    cr11
-                       /* cr12 UNDEFINED */
-#define TEA    cr13
-                       /* cr14-cr15 UNDEFINED */
-#define DCR    cr16
-#define KCR0   cr17
-#define KCR1   cr18
-                       /* cr19-cr31 UNDEFINED */
-                       /* cr32-cr61 RESERVED */
-#define CTC    cr62
-#define USR    cr63
-
-/*
- * ABI dependent registers (general purpose set)
- */
-#define RET    r2
-#define ARG1   r2
-#define ARG2   r3
-#define ARG3   r4
-#define ARG4   r5
-#define ARG5   r6
-#define ARG6   r7
-#define SP     r15
-#define LINK   r18
-#define ZERO   r63
-
-/*
- * Status register defines: used only by assembly sources (and
- *                         syntax independednt)
- */
-#define SR_RESET_VAL   0x0000000050008000
-#define SR_HARMLESS    0x00000000500080f0      /* Write ignores for most */
-#define SR_ENABLE_FPU  0xffffffffffff7fff      /* AND with this */
-
-#if defined (CONFIG_SH64_SR_WATCH)
-#define SR_ENABLE_MMU  0x0000000084000000      /* OR with this */
-#else
-#define SR_ENABLE_MMU  0x0000000080000000      /* OR with this */
-#endif
-
-#define SR_UNBLOCK_EXC 0xffffffffefffffff      /* AND with this */
-#define SR_BLOCK_EXC   0x0000000010000000      /* OR with this */
-
-#else  /* Not __ASSEMBLY__ syntax */
-
-/*
-** Stringify reg. name
-*/
-#define __str(x)  #x
-
-/* Stringify control register names for use in inline assembly */
-#define __SR __str(SR)
-#define __SSR __str(SSR)
-#define __PSSR __str(PSSR)
-#define __INTEVT __str(INTEVT)
-#define __EXPEVT __str(EXPEVT)
-#define __PEXPEVT __str(PEXPEVT)
-#define __TRA __str(TRA)
-#define __SPC __str(SPC)
-#define __PSPC __str(PSPC)
-#define __RESVEC __str(RESVEC)
-#define __VBR __str(VBR)
-#define __TEA __str(TEA)
-#define __DCR __str(DCR)
-#define __KCR0 __str(KCR0)
-#define __KCR1 __str(KCR1)
-#define __CTC __str(CTC)
-#define __USR __str(USR)
-
-#endif /* __ASSEMBLY__ */
-#endif /* __ASM_SH64_REGISTERS_H */
-
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