Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=600ee240d15e535d51e6c2b2f8475f0aa42885ea
Commit:     600ee240d15e535d51e6c2b2f8475f0aa42885ea
Parent:     061854fd155116ab1f40c39a75e2c641827fd246
Author:     Paul Mundt <[EMAIL PROTECTED]>
AuthorDate: Mon Nov 19 19:13:38 2007 +0900
Committer:  Paul Mundt <[EMAIL PROTECTED]>
CommitDate: Mon Jan 28 13:18:48 2008 +0900

    sh: Move over and enable FPU support for SH-5.
    
    Signed-off-by: Paul Mundt <[EMAIL PROTECTED]>
---
 arch/sh/Kconfig.sh64            |    1 +
 arch/sh/kernel/cpu/sh5/Makefile |    1 +
 arch/sh/kernel/cpu/sh5/fpu.c    |  170 +++++++++++++++++++++++++++++++++++++++
 arch/sh/kernel/process_64.c     |    8 +-
 arch/sh/kernel/signal_64.c      |    4 +-
 arch/sh64/kernel/fpu.c          |  170 ---------------------------------------
 6 files changed, 178 insertions(+), 176 deletions(-)

diff --git a/arch/sh/Kconfig.sh64 b/arch/sh/Kconfig.sh64
index 10f5d30..e37cd8c 100644
--- a/arch/sh/Kconfig.sh64
+++ b/arch/sh/Kconfig.sh64
@@ -83,6 +83,7 @@ choice
 
 config CPU_SH5
        bool "SH-5"
+       select CPU_HAS_FPU
 
 endchoice
 
diff --git a/arch/sh/kernel/cpu/sh5/Makefile b/arch/sh/kernel/cpu/sh5/Makefile
index 7ea1073..6d388e8 100644
--- a/arch/sh/kernel/cpu/sh5/Makefile
+++ b/arch/sh/kernel/cpu/sh5/Makefile
@@ -1,3 +1,4 @@
 obj-y := entry.o switchto.o
 
 obj-$(CONFIG_KALLSYMS)         += unwind.o
+obj-$(CONFIG_SH_FPU)           += fpu.o
diff --git a/arch/sh/kernel/cpu/sh5/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c
new file mode 100644
index 0000000..d3f5e74
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh5/fpu.c
@@ -0,0 +1,170 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * arch/sh64/kernel/fpu.c
+ *
+ * Copyright (C) 2001  Manuela Cirronis, Paolo Alberelli
+ * Copyright (C) 2002  STMicroelectronics Limited
+ *   Author : Stuart Menefy
+ *
+ * Started from SH4 version:
+ *   Copyright (C) 1999, 2000  Kaz Kojima & Niibe Yutaka
+ *
+ */
+
+#include <linux/sched.h>
+#include <linux/signal.h>
+#include <asm/processor.h>
+#include <asm/user.h>
+#include <asm/io.h>
+
+/*
+ * Initially load the FPU with signalling NANS.  This bit pattern
+ * has the property that no matter whether considered as single or as
+ * double precision, it still represents a signalling NAN.
+ */
+#define sNAN64         0xFFFFFFFFFFFFFFFFULL
+#define sNAN32         0xFFFFFFFFUL
+
+static union sh_fpu_union init_fpuregs = {
+       .hard = {
+         .fp_regs = { [0 ... 63] = sNAN32 },
+         .fpscr = FPSCR_INIT
+       }
+};
+
+inline void fpsave(struct sh_fpu_hard_struct *fpregs)
+{
+       asm volatile("fst.p     %0, (0*8), fp0\n\t"
+                    "fst.p     %0, (1*8), fp2\n\t"
+                    "fst.p     %0, (2*8), fp4\n\t"
+                    "fst.p     %0, (3*8), fp6\n\t"
+                    "fst.p     %0, (4*8), fp8\n\t"
+                    "fst.p     %0, (5*8), fp10\n\t"
+                    "fst.p     %0, (6*8), fp12\n\t"
+                    "fst.p     %0, (7*8), fp14\n\t"
+                    "fst.p     %0, (8*8), fp16\n\t"
+                    "fst.p     %0, (9*8), fp18\n\t"
+                    "fst.p     %0, (10*8), fp20\n\t"
+                    "fst.p     %0, (11*8), fp22\n\t"
+                    "fst.p     %0, (12*8), fp24\n\t"
+                    "fst.p     %0, (13*8), fp26\n\t"
+                    "fst.p     %0, (14*8), fp28\n\t"
+                    "fst.p     %0, (15*8), fp30\n\t"
+                    "fst.p     %0, (16*8), fp32\n\t"
+                    "fst.p     %0, (17*8), fp34\n\t"
+                    "fst.p     %0, (18*8), fp36\n\t"
+                    "fst.p     %0, (19*8), fp38\n\t"
+                    "fst.p     %0, (20*8), fp40\n\t"
+                    "fst.p     %0, (21*8), fp42\n\t"
+                    "fst.p     %0, (22*8), fp44\n\t"
+                    "fst.p     %0, (23*8), fp46\n\t"
+                    "fst.p     %0, (24*8), fp48\n\t"
+                    "fst.p     %0, (25*8), fp50\n\t"
+                    "fst.p     %0, (26*8), fp52\n\t"
+                    "fst.p     %0, (27*8), fp54\n\t"
+                    "fst.p     %0, (28*8), fp56\n\t"
+                    "fst.p     %0, (29*8), fp58\n\t"
+                    "fst.p     %0, (30*8), fp60\n\t"
+                    "fst.p     %0, (31*8), fp62\n\t"
+
+                    "fgetscr   fr63\n\t"
+                    "fst.s     %0, (32*8), fr63\n\t"
+               : /* no output */
+               : "r" (fpregs)
+               : "memory");
+}
+
+
+static inline void
+fpload(struct sh_fpu_hard_struct *fpregs)
+{
+       asm volatile("fld.p     %0, (0*8), fp0\n\t"
+                    "fld.p     %0, (1*8), fp2\n\t"
+                    "fld.p     %0, (2*8), fp4\n\t"
+                    "fld.p     %0, (3*8), fp6\n\t"
+                    "fld.p     %0, (4*8), fp8\n\t"
+                    "fld.p     %0, (5*8), fp10\n\t"
+                    "fld.p     %0, (6*8), fp12\n\t"
+                    "fld.p     %0, (7*8), fp14\n\t"
+                    "fld.p     %0, (8*8), fp16\n\t"
+                    "fld.p     %0, (9*8), fp18\n\t"
+                    "fld.p     %0, (10*8), fp20\n\t"
+                    "fld.p     %0, (11*8), fp22\n\t"
+                    "fld.p     %0, (12*8), fp24\n\t"
+                    "fld.p     %0, (13*8), fp26\n\t"
+                    "fld.p     %0, (14*8), fp28\n\t"
+                    "fld.p     %0, (15*8), fp30\n\t"
+                    "fld.p     %0, (16*8), fp32\n\t"
+                    "fld.p     %0, (17*8), fp34\n\t"
+                    "fld.p     %0, (18*8), fp36\n\t"
+                    "fld.p     %0, (19*8), fp38\n\t"
+                    "fld.p     %0, (20*8), fp40\n\t"
+                    "fld.p     %0, (21*8), fp42\n\t"
+                    "fld.p     %0, (22*8), fp44\n\t"
+                    "fld.p     %0, (23*8), fp46\n\t"
+                    "fld.p     %0, (24*8), fp48\n\t"
+                    "fld.p     %0, (25*8), fp50\n\t"
+                    "fld.p     %0, (26*8), fp52\n\t"
+                    "fld.p     %0, (27*8), fp54\n\t"
+                    "fld.p     %0, (28*8), fp56\n\t"
+                    "fld.p     %0, (29*8), fp58\n\t"
+                    "fld.p     %0, (30*8), fp60\n\t"
+
+                    "fld.s     %0, (32*8), fr63\n\t"
+                    "fputscr   fr63\n\t"
+
+                    "fld.p     %0, (31*8), fp62\n\t"
+               : /* no output */
+               : "r" (fpregs) );
+}
+
+void fpinit(struct sh_fpu_hard_struct *fpregs)
+{
+       *fpregs = init_fpuregs.hard;
+}
+
+asmlinkage void
+do_fpu_error(unsigned long ex, struct pt_regs *regs)
+{
+       struct task_struct *tsk = current;
+
+       regs->pc += 4;
+
+       tsk->thread.trap_no = 11;
+       tsk->thread.error_code = 0;
+       force_sig(SIGFPE, tsk);
+}
+
+
+asmlinkage void
+do_fpu_state_restore(unsigned long ex, struct pt_regs *regs)
+{
+       void die(const char *str, struct pt_regs *regs, long err);
+
+       if (! user_mode(regs))
+               die("FPU used in kernel", regs, ex);
+
+       regs->sr &= ~SR_FD;
+
+       if (last_task_used_math == current)
+               return;
+
+       enable_fpu();
+       if (last_task_used_math != NULL) {
+               /* Other processes fpu state, save away */
+               fpsave(&last_task_used_math->thread.fpu.hard);
+        }
+        last_task_used_math = current;
+        if (used_math()) {
+                fpload(&current->thread.fpu.hard);
+        } else {
+               /* First time FPU user.  */
+               fpload(&init_fpuregs.hard);
+                set_used_math();
+        }
+       disable_fpu();
+}
+
diff --git a/arch/sh/kernel/process_64.c b/arch/sh/kernel/process_64.c
index 0761af4..0c2bc61 100644
--- a/arch/sh/kernel/process_64.c
+++ b/arch/sh/kernel/process_64.c
@@ -469,9 +469,9 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
        fpvalid = !!tsk_used_math(tsk);
        if (fpvalid) {
                if (current == last_task_used_math) {
-                       grab_fpu();
+                       enable_fpu();
                        fpsave(&tsk->thread.fpu.hard);
-                       release_fpu();
+                       disable_fpu();
                        last_task_used_math = 0;
                        regs->sr |= SR_FD;
                }
@@ -496,9 +496,9 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned 
long usp,
 
 #ifdef CONFIG_SH_FPU
        if(last_task_used_math == current) {
-               grab_fpu();
+               enable_fpu();
                fpsave(&current->thread.fpu.hard);
-               release_fpu();
+               disable_fpu();
                last_task_used_math = NULL;
                regs->sr |= SR_FD;
        }
diff --git a/arch/sh/kernel/signal_64.c b/arch/sh/kernel/signal_64.c
index 069fb60..08f403e 100644
--- a/arch/sh/kernel/signal_64.c
+++ b/arch/sh/kernel/signal_64.c
@@ -211,9 +211,9 @@ setup_sigcontext_fpu(struct pt_regs *regs, struct 
sigcontext __user *sc)
                return err;
 
        if (current == last_task_used_math) {
-               grab_fpu();
+               enable_fpu();
                fpsave(&current->thread.fpu.hard);
-               release_fpu();
+               disable_fpu();
                last_task_used_math = NULL;
                regs->sr |= SR_FD;
        }
diff --git a/arch/sh64/kernel/fpu.c b/arch/sh64/kernel/fpu.c
deleted file mode 100644
index 8ad4ed6..0000000
--- a/arch/sh64/kernel/fpu.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * arch/sh64/kernel/fpu.c
- *
- * Copyright (C) 2001  Manuela Cirronis, Paolo Alberelli
- * Copyright (C) 2002  STMicroelectronics Limited
- *   Author : Stuart Menefy
- *
- * Started from SH4 version:
- *   Copyright (C) 1999, 2000  Kaz Kojima & Niibe Yutaka
- *
- */
-
-#include <linux/sched.h>
-#include <linux/signal.h>
-#include <asm/processor.h>
-#include <asm/user.h>
-#include <asm/io.h>
-
-/*
- * Initially load the FPU with signalling NANS.  This bit pattern
- * has the property that no matter whether considered as single or as
- * double precision, it still represents a signalling NAN.
- */
-#define sNAN64         0xFFFFFFFFFFFFFFFFULL
-#define sNAN32         0xFFFFFFFFUL
-
-static union sh_fpu_union init_fpuregs = {
-       .hard = {
-         .fp_regs = { [0 ... 63] = sNAN32 },
-         .fpscr = FPSCR_INIT
-       }
-};
-
-inline void fpsave(struct sh_fpu_hard_struct *fpregs)
-{
-       asm volatile("fst.p     %0, (0*8), fp0\n\t"
-                    "fst.p     %0, (1*8), fp2\n\t"
-                    "fst.p     %0, (2*8), fp4\n\t"
-                    "fst.p     %0, (3*8), fp6\n\t"
-                    "fst.p     %0, (4*8), fp8\n\t"
-                    "fst.p     %0, (5*8), fp10\n\t"
-                    "fst.p     %0, (6*8), fp12\n\t"
-                    "fst.p     %0, (7*8), fp14\n\t"
-                    "fst.p     %0, (8*8), fp16\n\t"
-                    "fst.p     %0, (9*8), fp18\n\t"
-                    "fst.p     %0, (10*8), fp20\n\t"
-                    "fst.p     %0, (11*8), fp22\n\t"
-                    "fst.p     %0, (12*8), fp24\n\t"
-                    "fst.p     %0, (13*8), fp26\n\t"
-                    "fst.p     %0, (14*8), fp28\n\t"
-                    "fst.p     %0, (15*8), fp30\n\t"
-                    "fst.p     %0, (16*8), fp32\n\t"
-                    "fst.p     %0, (17*8), fp34\n\t"
-                    "fst.p     %0, (18*8), fp36\n\t"
-                    "fst.p     %0, (19*8), fp38\n\t"
-                    "fst.p     %0, (20*8), fp40\n\t"
-                    "fst.p     %0, (21*8), fp42\n\t"
-                    "fst.p     %0, (22*8), fp44\n\t"
-                    "fst.p     %0, (23*8), fp46\n\t"
-                    "fst.p     %0, (24*8), fp48\n\t"
-                    "fst.p     %0, (25*8), fp50\n\t"
-                    "fst.p     %0, (26*8), fp52\n\t"
-                    "fst.p     %0, (27*8), fp54\n\t"
-                    "fst.p     %0, (28*8), fp56\n\t"
-                    "fst.p     %0, (29*8), fp58\n\t"
-                    "fst.p     %0, (30*8), fp60\n\t"
-                    "fst.p     %0, (31*8), fp62\n\t"
-
-                    "fgetscr   fr63\n\t"
-                    "fst.s     %0, (32*8), fr63\n\t"
-               : /* no output */
-               : "r" (fpregs)
-               : "memory");
-}
-
-
-static inline void
-fpload(struct sh_fpu_hard_struct *fpregs)
-{
-       asm volatile("fld.p     %0, (0*8), fp0\n\t"
-                    "fld.p     %0, (1*8), fp2\n\t"
-                    "fld.p     %0, (2*8), fp4\n\t"
-                    "fld.p     %0, (3*8), fp6\n\t"
-                    "fld.p     %0, (4*8), fp8\n\t"
-                    "fld.p     %0, (5*8), fp10\n\t"
-                    "fld.p     %0, (6*8), fp12\n\t"
-                    "fld.p     %0, (7*8), fp14\n\t"
-                    "fld.p     %0, (8*8), fp16\n\t"
-                    "fld.p     %0, (9*8), fp18\n\t"
-                    "fld.p     %0, (10*8), fp20\n\t"
-                    "fld.p     %0, (11*8), fp22\n\t"
-                    "fld.p     %0, (12*8), fp24\n\t"
-                    "fld.p     %0, (13*8), fp26\n\t"
-                    "fld.p     %0, (14*8), fp28\n\t"
-                    "fld.p     %0, (15*8), fp30\n\t"
-                    "fld.p     %0, (16*8), fp32\n\t"
-                    "fld.p     %0, (17*8), fp34\n\t"
-                    "fld.p     %0, (18*8), fp36\n\t"
-                    "fld.p     %0, (19*8), fp38\n\t"
-                    "fld.p     %0, (20*8), fp40\n\t"
-                    "fld.p     %0, (21*8), fp42\n\t"
-                    "fld.p     %0, (22*8), fp44\n\t"
-                    "fld.p     %0, (23*8), fp46\n\t"
-                    "fld.p     %0, (24*8), fp48\n\t"
-                    "fld.p     %0, (25*8), fp50\n\t"
-                    "fld.p     %0, (26*8), fp52\n\t"
-                    "fld.p     %0, (27*8), fp54\n\t"
-                    "fld.p     %0, (28*8), fp56\n\t"
-                    "fld.p     %0, (29*8), fp58\n\t"
-                    "fld.p     %0, (30*8), fp60\n\t"
-
-                    "fld.s     %0, (32*8), fr63\n\t"
-                    "fputscr   fr63\n\t"
-
-                    "fld.p     %0, (31*8), fp62\n\t"
-               : /* no output */
-               : "r" (fpregs) );
-}
-
-void fpinit(struct sh_fpu_hard_struct *fpregs)
-{
-       *fpregs = init_fpuregs.hard;
-}
-
-asmlinkage void
-do_fpu_error(unsigned long ex, struct pt_regs *regs)
-{
-       struct task_struct *tsk = current;
-
-       regs->pc += 4;
-
-       tsk->thread.trap_no = 11;
-       tsk->thread.error_code = 0;
-       force_sig(SIGFPE, tsk);
-}
-
-
-asmlinkage void
-do_fpu_state_restore(unsigned long ex, struct pt_regs *regs)
-{
-       void die(const char *str, struct pt_regs *regs, long err);
-
-       if (! user_mode(regs))
-               die("FPU used in kernel", regs, ex);
-
-       regs->sr &= ~SR_FD;
-
-       if (last_task_used_math == current)
-               return;
-
-       grab_fpu();
-       if (last_task_used_math != NULL) {
-               /* Other processes fpu state, save away */
-               fpsave(&last_task_used_math->thread.fpu.hard);
-        }
-        last_task_used_math = current;
-        if (used_math()) {
-                fpload(&current->thread.fpu.hard);
-        } else {
-               /* First time FPU user.  */
-               fpload(&init_fpuregs.hard);
-                set_used_math();
-        }
-       release_fpu();
-}
-
-
To unsubscribe from this list: send the line "unsubscribe git-commits-head" in
the body of a message to [EMAIL PROTECTED]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Reply via email to