Commit:     fde1b3fa947c2512e3715962ebb1d3a6a9b9bb7d
Parent:     2a10e7c41254941cac87be1eccdcb6379ce097f5
Author:     Andi Kleen <[EMAIL PROTECTED]>
AuthorDate: Wed Jan 30 13:32:38 2008 +0100
Committer:  Ingo Molnar <[EMAIL PROTECTED]>
CommitDate: Wed Jan 30 13:32:38 2008 +0100

    x86: introduce rdtsc_barrier()
    rdtsc_barrier() is a new barrier primitive that stops RDTSC speculation
    to avoid races with timer interrupts on other CPUs.
    It expands either to LFENCE (for Intel CPUs) or MFENCE (for
    AMD CPUs) which stops RDTSC on all currently known microarchitectures
    that implement SSE. On CPUs without SSE there is generally no RDTSC
    [ [EMAIL PROTECTED]: renamed it to rdtsc_barrier() and made it x86-only ]
    Signed-off-by: Andi Kleen <[EMAIL PROTECTED]>
    Signed-off-by: Ingo Molnar <[EMAIL PROTECTED]>
    Signed-off-by: Thomas Gleixner <[EMAIL PROTECTED]>
 include/asm-x86/system.h |   13 +++++++++++++
 1 files changed, 13 insertions(+), 0 deletions(-)

diff --git a/include/asm-x86/system.h b/include/asm-x86/system.h
index 6c7d1fd..39474f2 100644
--- a/include/asm-x86/system.h
+++ b/include/asm-x86/system.h
@@ -5,6 +5,7 @@
 #include <asm/segment.h>
 #include <asm/cpufeature.h>
 #include <asm/cmpxchg.h>
+#include <asm/nops.h>
 #include <linux/kernel.h>
 #include <linux/irqflags.h>
@@ -395,5 +396,17 @@ void default_idle(void);
 #define set_mb(var, value) do { var = value; barrier(); } while (0)
+ * Stop RDTSC speculation. This is needed when you need to use RDTSC
+ * (or get_cycles or vread that possibly accesses the TSC) in a defined
+ * code region.
+ *
+ * (Could use an alternative three way for this if there was one.)
+ */
+static inline void rdtsc_barrier(void)
+       alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
+       alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
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