Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=94ea03cdda520f0c0dc80cbb4674ab9a33749ee2
Commit:     94ea03cdda520f0c0dc80cbb4674ab9a33749ee2
Parent:     4c9890c246121d070deb8cf5cf53e80caffc4dde
Author:     Glauber de Oliveira Costa <[EMAIL PROTECTED]>
AuthorDate: Wed Jan 30 13:33:19 2008 +0100
Committer:  Ingo Molnar <[EMAIL PROTECTED]>
CommitDate: Wed Jan 30 13:33:19 2008 +0100

    x86: provide read and write cr8 paravirt hooks
    
    Since the cr8 manipulation functions ended up staying in the tree,
    they can't be defined just when PARAVIRT is off: In this patch,
    those functions are defined for the PARAVIRT case too.
    
    [ [EMAIL PROTECTED]: fixes ]
    
    Signed-off-by: Glauber de Oliveira Costa <[EMAIL PROTECTED]>
    Signed-off-by: Ingo Molnar <[EMAIL PROTECTED]>
    Signed-off-by: Thomas Gleixner <[EMAIL PROTECTED]>
---
 include/asm-x86/paravirt.h |    2 ++
 include/asm-x86/system.h   |   30 ++++++++++++++++--------------
 2 files changed, 18 insertions(+), 14 deletions(-)

diff --git a/include/asm-x86/paravirt.h b/include/asm-x86/paravirt.h
index 73547ac..a55f95e 100644
--- a/include/asm-x86/paravirt.h
+++ b/include/asm-x86/paravirt.h
@@ -619,6 +619,7 @@ static inline void write_cr4(unsigned long x)
        PVOP_VCALL1(pv_cpu_ops.write_cr4, x);
 }
 
+#ifdef CONFIG_X86_64
 static inline unsigned long read_cr8(void)
 {
        return PVOP_CALL0(unsigned long, pv_cpu_ops.read_cr8);
@@ -628,6 +629,7 @@ static inline void write_cr8(unsigned long x)
 {
        PVOP_VCALL1(pv_cpu_ops.write_cr8, x);
 }
+#endif
 
 static inline void raw_safe_halt(void)
 {
diff --git a/include/asm-x86/system.h b/include/asm-x86/system.h
index 39474f2..ee32ef9 100644
--- a/include/asm-x86/system.h
+++ b/include/asm-x86/system.h
@@ -231,6 +231,20 @@ static inline void native_write_cr4(unsigned long val)
        asm volatile("mov %0,%%cr4": :"r" (val), "m" (__force_order));
 }
 
+#ifdef CONFIG_X86_64
+static inline unsigned long native_read_cr8(void)
+{
+       unsigned long cr8;
+       asm volatile("movq %%cr8,%0" : "=r" (cr8));
+       return cr8;
+}
+
+static inline void native_write_cr8(unsigned long val)
+{
+       asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
+}
+#endif
+
 static inline void native_wbinvd(void)
 {
        asm volatile("wbinvd": : :"memory");
@@ -248,21 +262,9 @@ static inline void native_wbinvd(void)
 #define read_cr4_safe()        (native_read_cr4_safe())
 #define write_cr4(x)   (native_write_cr4(x))
 #define wbinvd()       (native_wbinvd())
-
 #ifdef CONFIG_X86_64
-
-static inline unsigned long read_cr8(void)
-{
-       unsigned long cr8;
-       asm volatile("movq %%cr8,%0" : "=r" (cr8));
-       return cr8;
-}
-
-static inline void write_cr8(unsigned long val)
-{
-       asm volatile("movq %0,%%cr8" :: "r" (val) : "memory");
-}
-
+#define read_cr8()     (native_read_cr8())
+#define write_cr8(x)   (native_write_cr8(x))
 #endif
 
 /* Clear the 'TS' bit */
-
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