Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=6fdc05d4794056e0b98901646c4b68c60a01d5eb
Commit:     6fdc05d4794056e0b98901646c4b68c60a01d5eb
Parent:     c3bcfb57e1e64b9b2f8b2d90564826637e21c5ea
Author:     Jeremy Fitzhardinge <[EMAIL PROTECTED]>
AuthorDate: Wed Jan 30 13:32:57 2008 +0100
Committer:  Ingo Molnar <[EMAIL PROTECTED]>
CommitDate: Wed Jan 30 13:32:57 2008 +0100

    x86: unify pgtable accessors which use
    
    Make users of supported_pte_mask common.  This has the side-effect of
    introducing the variable for 32-bit non-PAE, but I think its a pretty
    small cost to simplify the code.
    
    Signed-off-by: Jeremy Fitzhardinge <[EMAIL PROTECTED]>
    
    Signed-off-by: Ingo Molnar <[EMAIL PROTECTED]>
    Signed-off-by: Thomas Gleixner <[EMAIL PROTECTED]>
---
 arch/x86/mm/init_32.c            |    5 +++--
 include/asm-x86/pgtable-2level.h |    2 --
 include/asm-x86/pgtable-3level.h |   14 --------------
 include/asm-x86/pgtable.h        |   14 ++++++++++++++
 include/asm-x86/pgtable_64.h     |   18 ------------------
 5 files changed, 17 insertions(+), 36 deletions(-)

diff --git a/arch/x86/mm/init_32.c b/arch/x86/mm/init_32.c
index 2913097..04332c0 100644
--- a/arch/x86/mm/init_32.c
+++ b/arch/x86/mm/init_32.c
@@ -478,11 +478,12 @@ void zap_low_mappings (void)
 
 int nx_enabled = 0;
 
+pteval_t __supported_pte_mask __read_mostly = ~_PAGE_NX;
+EXPORT_SYMBOL_GPL(__supported_pte_mask);
+
 #ifdef CONFIG_X86_PAE
 
 static int disable_nx __initdata = 0;
-u64 __supported_pte_mask __read_mostly = ~_PAGE_NX;
-EXPORT_SYMBOL_GPL(__supported_pte_mask);
 
 /*
  * noexec = on|off
diff --git a/include/asm-x86/pgtable-2level.h b/include/asm-x86/pgtable-2level.h
index 84b03cf..d3171c0 100644
--- a/include/asm-x86/pgtable-2level.h
+++ b/include/asm-x86/pgtable-2level.h
@@ -53,8 +53,6 @@ static inline pte_t native_ptep_get_and_clear(pte_t *xp)
 #define pte_page(x)            pfn_to_page(pte_pfn(x))
 #define pte_none(x)            (!(x).pte_low)
 #define pte_pfn(x)             (pte_val(x) >> PAGE_SHIFT)
-#define pfn_pte(pfn, prot)     __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
-#define pfn_pmd(pfn, prot)     __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
 
 /*
  * All present pages are kernel-executable:
diff --git a/include/asm-x86/pgtable-3level.h b/include/asm-x86/pgtable-3level.h
index 9816346..61a7d00 100644
--- a/include/asm-x86/pgtable-3level.h
+++ b/include/asm-x86/pgtable-3level.h
@@ -158,20 +158,6 @@ static inline unsigned long pte_pfn(pte_t pte)
        return (pte_val(pte) & ~_PAGE_NX) >> PAGE_SHIFT;
 }
 
-extern unsigned long long __supported_pte_mask;
-
-static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
-{
-       return __pte((((unsigned long long)page_nr << PAGE_SHIFT) |
-                     pgprot_val(pgprot)) & __supported_pte_mask);
-}
-
-static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
-{
-       return __pmd((((unsigned long long)page_nr << PAGE_SHIFT) |
-                     pgprot_val(pgprot)) & __supported_pte_mask);
-}
-
 /*
  * Bits 0, 6 and 7 are taken in the low part of the pte,
  * put the 32 bits of offset into the high part.
diff --git a/include/asm-x86/pgtable.h b/include/asm-x86/pgtable.h
index 4c03ff2..b29a122 100644
--- a/include/asm-x86/pgtable.h
+++ b/include/asm-x86/pgtable.h
@@ -141,6 +141,20 @@ static inline pte_t pte_mkwrite(pte_t pte) { return 
__pte(pte_val(pte) | _PAGE_R
 static inline pte_t pte_mkhuge(pte_t pte)      { return __pte(pte_val(pte) | 
_PAGE_PSE); }
 static inline pte_t pte_clrhuge(pte_t pte)     { return __pte(pte_val(pte) & 
~_PAGE_PSE); }
 
+extern pteval_t __supported_pte_mask;
+
+static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
+{
+       return __pte((((phys_addr_t)page_nr << PAGE_SHIFT) |
+                     pgprot_val(pgprot)) & __supported_pte_mask);
+}
+
+static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
+{
+       return __pmd((((phys_addr_t)page_nr << PAGE_SHIFT) |
+                     pgprot_val(pgprot)) & __supported_pte_mask);
+}
+
 #endif /* __ASSEMBLY__ */
 
 #ifdef CONFIG_X86_32
diff --git a/include/asm-x86/pgtable_64.h b/include/asm-x86/pgtable_64.h
index 84f47f9..57e4ebe 100644
--- a/include/asm-x86/pgtable_64.h
+++ b/include/asm-x86/pgtable_64.h
@@ -17,7 +17,6 @@ extern pud_t level3_kernel_pgt[512];
 extern pud_t level3_ident_pgt[512];
 extern pmd_t level2_kernel_pgt[512];
 extern pgd_t init_level4_pgt[];
-extern unsigned long __supported_pte_mask;
 
 #define swapper_pg_dir init_level4_pgt
 
@@ -165,14 +164,6 @@ static inline unsigned long pmd_bad(pmd_t pmd)
 #define pte_page(x)    pfn_to_page(pte_pfn(x))
 #define pte_pfn(x)  ((pte_val(x) & __PHYSICAL_MASK) >> PAGE_SHIFT)
 
-static inline pte_t pfn_pte(unsigned long page_nr, pgprot_t pgprot)
-{
-       pte_t pte;
-       pte_val(pte) = (page_nr << PAGE_SHIFT);
-       pte_val(pte) |= pgprot_val(pgprot);
-       pte_val(pte) &= __supported_pte_mask;
-       return pte;
-}
 struct vm_area_struct;
 
 static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, 
unsigned long addr, pte_t *ptep)
@@ -239,15 +230,6 @@ static inline void ptep_set_wrprotect(struct mm_struct 
*mm, unsigned long addr,
 /* page, protection -> pte */
 #define mk_pte(page, pgprot)   pfn_pte(page_to_pfn(page), (pgprot))
  
-/* Change flags of a PTE */
-static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
-{ 
-       pte_val(pte) &= _PAGE_CHG_MASK;
-       pte_val(pte) |= pgprot_val(newprot);
-       pte_val(pte) &= __supported_pte_mask;
-       return pte; 
-}
-
 #define pte_index(address) \
                (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 #define pte_offset_kernel(dir, address) ((pte_t *) pmd_page_vaddr(*(dir)) + \
-
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