Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=dc88416b098a1e0bde82dc4e00ed95109681ab5c
Commit:     dc88416b098a1e0bde82dc4e00ed95109681ab5c
Parent:     8aaed98c1e28a2c803309fcb2d32761bba4bee09
Author:     Stefan Roese <[EMAIL PROTECTED]>
AuthorDate: Sat Dec 15 19:10:56 2007 +1100
Committer:  Josh Boyer <[EMAIL PROTECTED]>
CommitDate: Sun Dec 23 13:36:33 2007 -0600

    [POWERPC] 4xx: Change Kilauea PCIe bus ranges in dts file
    
    Currently we have some limitations in the 4xx PCIe driver and can't
    support all possible PCIe busses. But the current limits in the
    dts file are quite low (only 16 busses per RC). This patch increases
    the number to 64 per RC.
    
    Signed-off-by: Stefan Roese <[EMAIL PROTECTED]>
    Signed-off-by: Josh Boyer <[EMAIL PROTECTED]>
---
 arch/powerpc/boot/dts/kilauea.dts |    8 ++++----
 1 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/boot/dts/kilauea.dts 
b/arch/powerpc/boot/dts/kilauea.dts
index 3814199..67c7ea1 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -284,8 +284,8 @@
                        /* Inbound 2GB range starting at 0 */
                        dma-ranges = <42000000 0 0 0 0 80000000>;
 
-                       /* This drives busses 0x00 to 0x0f */
-                       bus-range = <00 0f>;
+                       /* This drives busses 0x00 to 0x3f */
+                       bus-range = <00 3f>;
 
                        /* Legacy interrupts (note the weird polarity, the 
bridge seems
                         * to invert PCIe legacy interrupts).
@@ -325,8 +325,8 @@
                        /* Inbound 2GB range starting at 0 */
                        dma-ranges = <42000000 0 0 0 0 80000000>;
 
-                       /* This drives busses 0x10 to 0x1f */
-                       bus-range = <10 1f>;
+                       /* This drives busses 0x40 to 0x7f */
+                       bus-range = <40 7f>;
 
                        /* Legacy interrupts (note the weird polarity, the 
bridge seems
                         * to invert PCIe legacy interrupts).
-
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