Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=a40955167ffc34a1651ebe2e88a8c1db2987fc91
Commit:     a40955167ffc34a1651ebe2e88a8c1db2987fc91
Parent:     b676d84e72467a2e31191f41abebd59ab53a06bb
Author:     Stefan Roese <[EMAIL PROTECTED]>
AuthorDate: Wed Jan 16 18:24:52 2008 +1100
Committer:  Josh Boyer <[EMAIL PROTECTED]>
CommitDate: Fri Jan 25 07:06:11 2008 -0600

    [POWERPC] 4xx: Add AMCC Haleakala (405EXr) dts
    
    The patch adds the Haleakala dts. The Haleakala is a stripped down
    version of the Kilauea (405EX) with only one EMAC and only one PCIe
    interface.
    
    Signed-off-by: Stefan Roese <[EMAIL PROTECTED]>
    Signed-off-by: Josh Boyer <[EMAIL PROTECTED]>
---
 arch/powerpc/boot/dts/haleakala.dts |  274 +++++++++++++++++++++++++++++++++++
 1 files changed, 274 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/haleakala.dts 
b/arch/powerpc/boot/dts/haleakala.dts
new file mode 100644
index 0000000..5dd3d15
--- /dev/null
+++ b/arch/powerpc/boot/dts/haleakala.dts
@@ -0,0 +1,274 @@
+/*
+ * Device Tree Source for AMCC Haleakala (405EXr)
+ *
+ * Copyright 2008 DENX Software Engineering, Stefan Roese <[EMAIL PROTECTED]>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2.  This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/ {
+       #address-cells = <1>;
+       #size-cells = <1>;
+       model = "amcc,haleakala";
+       compatible = "amcc,kilauea";
+       dcr-parent = <&/cpus/[EMAIL PROTECTED]>;
+
+       aliases {
+               ethernet0 = &EMAC0;
+               serial0 = &UART0;
+               serial1 = &UART1;
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               [EMAIL PROTECTED] {
+                       device_type = "cpu";
+                       model = "PowerPC,405EXr";
+                       reg = <0>;
+                       clock-frequency = <0>; /* Filled in by U-Boot */
+                       timebase-frequency = <0>; /* Filled in by U-Boot */
+                       i-cache-line-size = <20>;
+                       d-cache-line-size = <20>;
+                       i-cache-size = <4000>; /* 16 kB */
+                       d-cache-size = <4000>; /* 16 kB */
+                       dcr-controller;
+                       dcr-access-method = "native";
+               };
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0 0>; /* Filled in by U-Boot */
+       };
+
+       UIC0: interrupt-controller {
+               compatible = "ibm,uic-405exr", "ibm,uic";
+               interrupt-controller;
+               cell-index = <0>;
+               dcr-reg = <0c0 009>;
+               #address-cells = <0>;
+               #size-cells = <0>;
+               #interrupt-cells = <2>;
+       };
+
+       UIC1: interrupt-controller1 {
+               compatible = "ibm,uic-405exr","ibm,uic";
+               interrupt-controller;
+               cell-index = <1>;
+               dcr-reg = <0d0 009>;
+               #address-cells = <0>;
+               #size-cells = <0>;
+               #interrupt-cells = <2>;
+               interrupts = <1e 4 1f 4>; /* cascade */
+               interrupt-parent = <&UIC0>;
+       };
+
+       UIC2: interrupt-controller2 {
+               compatible = "ibm,uic-405exr","ibm,uic";
+               interrupt-controller;
+               cell-index = <2>;
+               dcr-reg = <0e0 009>;
+               #address-cells = <0>;
+               #size-cells = <0>;
+               #interrupt-cells = <2>;
+               interrupts = <1c 4 1d 4>; /* cascade */
+               interrupt-parent = <&UIC0>;
+       };
+
+       plb {
+               compatible = "ibm,plb-405exr", "ibm,plb4";
+               #address-cells = <1>;
+               #size-cells = <1>;
+               ranges;
+               clock-frequency = <0>; /* Filled in by U-Boot */
+
+               SDRAM0: memory-controller {
+                       compatible = "ibm,sdram-405exr";
+                       dcr-reg = <010 2>;
+               };
+
+               MAL0: mcmal {
+                       compatible = "ibm,mcmal-405exr", "ibm,mcmal2";
+                       dcr-reg = <180 62>;
+                       num-tx-chans = <2>;
+                       num-rx-chans = <2>;
+                       interrupt-parent = <&MAL0>;
+                       interrupts = <0 1 2 3 4>;
+                       #interrupt-cells = <1>;
+                       #address-cells = <0>;
+                       #size-cells = <0>;
+                       interrupt-map = </*TXEOB*/ 0 &UIC0 a 4
+                                       /*RXEOB*/ 1 &UIC0 b 4
+                                       /*SERR*/  2 &UIC1 0 4
+                                       /*TXDE*/  3 &UIC1 1 4
+                                       /*RXDE*/  4 &UIC1 2 4>;
+                       interrupt-map-mask = <ffffffff>;
+               };
+
+               POB0: opb {
+                       compatible = "ibm,opb-405exr", "ibm,opb";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+                       ranges = <80000000 80000000 10000000
+                                 ef600000 ef600000 a00000
+                                 f0000000 f0000000 10000000>;
+                       dcr-reg = <0a0 5>;
+                       clock-frequency = <0>; /* Filled in by U-Boot */
+
+                       EBC0: ebc {
+                               compatible = "ibm,ebc-405exr", "ibm,ebc";
+                               dcr-reg = <012 2>;
+                               #address-cells = <2>;
+                               #size-cells = <1>;
+                               clock-frequency = <0>; /* Filled in by U-Boot */
+                               /* ranges property is supplied by U-Boot */
+                               interrupts = <5 1>;
+                               interrupt-parent = <&UIC1>;
+
+                               [EMAIL PROTECTED],0 {
+                                       compatible = "amd,s29gl512n", 
"cfi-flash";
+                                       bank-width = <2>;
+                                       reg = <0 000000 4000000>;
+                                       #address-cells = <1>;
+                                       #size-cells = <1>;
+                                       [EMAIL PROTECTED] {
+                                               label = "kernel";
+                                               reg = <0 200000>;
+                                       };
+                                       [EMAIL PROTECTED] {
+                                               label = "root";
+                                               reg = <200000 200000>;
+                                       };
+                                       [EMAIL PROTECTED] {
+                                               label = "user";
+                                               reg = <400000 3b60000>;
+                                       };
+                                       [EMAIL PROTECTED] {
+                                               label = "env";
+                                               reg = <3f60000 40000>;
+                                       };
+                                       [EMAIL PROTECTED] {
+                                               label = "u-boot";
+                                               reg = <3fa0000 60000>;
+                                       };
+                               };
+                       };
+
+                       UART0: [EMAIL PROTECTED] {
+                               device_type = "serial";
+                               compatible = "ns16550";
+                               reg = <ef600200 8>;
+                               virtual-reg = <ef600200>;
+                               clock-frequency = <0>; /* Filled in by U-Boot */
+                               current-speed = <0>;
+                               interrupt-parent = <&UIC0>;
+                               interrupts = <1a 4>;
+                       };
+
+                       UART1: [EMAIL PROTECTED] {
+                               device_type = "serial";
+                               compatible = "ns16550";
+                               reg = <ef600300 8>;
+                               virtual-reg = <ef600300>;
+                               clock-frequency = <0>; /* Filled in by U-Boot */
+                               current-speed = <0>;
+                               interrupt-parent = <&UIC0>;
+                               interrupts = <1 4>;
+                       };
+
+                       IIC0: [EMAIL PROTECTED] {
+                               compatible = "ibm,iic-405exr", "ibm,iic";
+                               reg = <ef600400 14>;
+                               interrupt-parent = <&UIC0>;
+                               interrupts = <2 4>;
+                       };
+
+                       IIC1: [EMAIL PROTECTED] {
+                               compatible = "ibm,iic-405exr", "ibm,iic";
+                               reg = <ef600500 14>;
+                               interrupt-parent = <&UIC0>;
+                               interrupts = <7 4>;
+                       };
+
+
+                       RGMII0: [EMAIL PROTECTED] {
+                               compatible = "ibm,rgmii-405exr", "ibm,rgmii";
+                               reg = <ef600b00 104>;
+                               has-mdio;
+                       };
+
+                       EMAC0: [EMAIL PROTECTED] {
+                               linux,network-index = <0>;
+                               device_type = "network";
+                               compatible = "ibm,emac-405exr", "ibm,emac4";
+                               interrupt-parent = <&EMAC0>;
+                               interrupts = <0 1>;
+                               #interrupt-cells = <1>;
+                               #address-cells = <0>;
+                               #size-cells = <0>;
+                               interrupt-map = </*Status*/ 0 &UIC0 18 4
+                                               /*Wake*/  1 &UIC1 1d 4>;
+                               reg = <ef600900 70>;
+                               local-mac-address = [000000000000]; /* Filled 
in by U-Boot */
+                               mal-device = <&MAL0>;
+                               mal-tx-channel = <0>;
+                               mal-rx-channel = <0>;
+                               cell-index = <0>;
+                               max-frame-size = <5dc>;
+                               rx-fifo-size = <1000>;
+                               tx-fifo-size = <800>;
+                               phy-mode = "rgmii";
+                               phy-map = <00000000>;
+                               rgmii-device = <&RGMII0>;
+                               rgmii-channel = <0>;
+                               has-inverted-stacr-oc;
+                               has-new-stacr-staopc;
+                       };
+               };
+
+               PCIE0: [EMAIL PROTECTED] {
+                       device_type = "pci";
+                       #interrupt-cells = <1>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       compatible = "ibm,plb-pciex-405exr", "ibm,plb-pciex";
+                       primary;
+                       port = <0>; /* port number */
+                       reg = <a0000000 20000000        /* Config space access 
*/
+                              ef000000 00001000>;      /* Registers */
+                       dcr-reg = <040 020>;
+                       sdr-base = <400>;
+
+                       /* Outbound ranges, one memory and one IO,
+                        * later cannot be changed
+                        */
+                       ranges = <02000000 0 80000000 90000000 0 08000000
+                                 01000000 0 00000000 e0000000 0 00010000>;
+
+                       /* Inbound 2GB range starting at 0 */
+                       dma-ranges = <42000000 0 0 0 0 80000000>;
+
+                       /* This drives busses 0x00 to 0x3f */
+                       bus-range = <00 3f>;
+
+                       /* Legacy interrupts (note the weird polarity, the 
bridge seems
+                        * to invert PCIe legacy interrupts).
+                        * We are de-swizzling here because the numbers are 
actually for
+                        * port of the root complex virtual P2P bridge. But I 
want
+                        * to avoid putting a node for it in the tree, so the 
numbers
+                        * below are basically de-swizzled numbers.
+                        * The real slot is on idsel 0, so the swizzling is 1:1
+                        */
+                       interrupt-map-mask = <0000 0 0 7>;
+                       interrupt-map = <
+                               0000 0 0 1 &UIC2 0 4 /* swizzled int A */
+                               0000 0 0 2 &UIC2 1 4 /* swizzled int B */
+                               0000 0 0 3 &UIC2 2 4 /* swizzled int C */
+                               0000 0 0 4 &UIC2 3 4 /* swizzled int D */>;
+               };
+       };
+};
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