Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=457aa81a13701f03d63a7e62ff169663651f5c64
Commit:     457aa81a13701f03d63a7e62ff169663651f5c64
Parent:     0052bc5d5c3adc4ee4ba567470aebe775fcf2006
Author:     Zhang Wei <[EMAIL PROTECTED]>
AuthorDate: Tue Oct 30 17:23:48 2007 +0800
Committer:  Kumar Gala <[EMAIL PROTECTED]>
CommitDate: Mon Jan 28 08:28:37 2008 -0600

    [POWERPC] Add docs for Freescale DMA & DMA channel device tree nodes
    
    Signed-off-by: Zhang Wei <[EMAIL PROTECTED]>
    Signed-off-by: Ebony Zhu <[EMAIL PROTECTED]>
    Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
 Documentation/powerpc/booting-without-of.txt |  128 ++++++++++++++++++++++++++
 1 files changed, 128 insertions(+), 0 deletions(-)

diff --git a/Documentation/powerpc/booting-without-of.txt 
b/Documentation/powerpc/booting-without-of.txt
index da98154..e56c1c7 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -2615,6 +2615,134 @@ platforms are moved over to use the 
flattened-device-tree model.
        - clock-frequency  : The frequency of the input clock, which typically
                             comes from an on-board dedicated oscillator.
 
+    * Freescale 83xx DMA Controller
+
+    Freescale PowerPC 83xx have on chip general purpose DMA controllers.
+
+    Required properties:
+
+    - compatible        : compatible list, contains 2 entries, first is
+                        "fsl,CHIP-dma", where CHIP is the processor
+                        (mpc8349, mpc8360, etc.) and the second is
+                        "fsl,elo-dma"
+    - reg               : <registers mapping for DMA general status reg>
+    - ranges           : Should be defined as specified in 1) to describe the
+                         DMA controller channels.
+    - cell-index        : controller index.  0 for controller @ 0x8100
+    - interrupts        : <interrupt mapping for DMA IRQ>
+    - interrupt-parent  : optional, if needed for interrupt mapping
+
+
+    - DMA channel nodes:
+           - compatible        : compatible list, contains 2 entries, first is
+                                "fsl,CHIP-dma-channel", where CHIP is the 
processor
+                                (mpc8349, mpc8350, etc.) and the second is
+                                "fsl,elo-dma-channel"
+           - reg               : <registers mapping for channel>
+           - cell-index        : dma channel index starts at 0.
+
+    Optional properties:
+           - interrupts        : <interrupt mapping for DMA channel IRQ>
+                                 (on 83xx this is expected to be identical to
+                                  the interrupts property of the parent node)
+           - interrupt-parent  : optional, if needed for interrupt mapping
+
+  Example:
+       [EMAIL PROTECTED] {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
+               reg = <82a8 4>;
+               ranges = <0 8100 1a4>;
+               interrupt-parent = <&ipic>;
+               interrupts = <47 8>;
+               cell-index = <0>;
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8349-dma-channel", 
"fsl,elo-dma-channel";
+                       cell-index = <0>;
+                       reg = <0 80>;
+               };
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8349-dma-channel", 
"fsl,elo-dma-channel";
+                       cell-index = <1>;
+                       reg = <80 80>;
+               };
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8349-dma-channel", 
"fsl,elo-dma-channel";
+                       cell-index = <2>;
+                       reg = <100 80>;
+               };
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8349-dma-channel", 
"fsl,elo-dma-channel";
+                       cell-index = <3>;
+                       reg = <180 80>;
+               };
+       };
+
+   * Freescale 85xx/86xx DMA Controller
+
+    Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers.
+
+    Required properties:
+
+    - compatible        : compatible list, contains 2 entries, first is
+                        "fsl,CHIP-dma", where CHIP is the processor
+                        (mpc8540, mpc8540, etc.) and the second is
+                        "fsl,eloplus-dma"
+    - reg               : <registers mapping for DMA general status reg>
+    - cell-index        : controller index.  0 for controller @ 0x21000,
+                                             1 for controller @ 0xc000
+    - ranges           : Should be defined as specified in 1) to describe the
+                         DMA controller channels.
+
+    - DMA channel nodes:
+           - compatible        : compatible list, contains 2 entries, first is
+                                "fsl,CHIP-dma-channel", where CHIP is the 
processor
+                                (mpc8540, mpc8560, etc.) and the second is
+                                "fsl,eloplus-dma-channel"
+           - cell-index        : dma channel index starts at 0.
+           - reg               : <registers mapping for channel>
+           - interrupts        : <interrupt mapping for DMA channel IRQ>
+           - interrupt-parent  : optional, if needed for interrupt mapping
+
+  Example:
+       [EMAIL PROTECTED] {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
+               reg = <21300 4>;
+               ranges = <0 21100 200>;
+               cell-index = <0>;
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8540-dma-channel", 
"fsl,eloplus-dma-channel";
+                       reg = <0 80>;
+                       cell-index = <0>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <14 2>;
+               };
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8540-dma-channel", 
"fsl,eloplus-dma-channel";
+                       reg = <80 80>;
+                       cell-index = <1>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <15 2>;
+               };
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8540-dma-channel", 
"fsl,eloplus-dma-channel";
+                       reg = <100 80>;
+                       cell-index = <2>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <16 2>;
+               };
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,mpc8540-dma-channel", 
"fsl,eloplus-dma-channel";
+                       reg = <180 80>;
+                       cell-index = <3>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <17 2>;
+               };
+       };
+
 
    More devices will be defined as this spec matures.
 
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