Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=30340998fae96c39de9bd6c43789001e2b110690
Commit:     30340998fae96c39de9bd6c43789001e2b110690
Parent:     0e0fffe887673a04bb8f8ec8287c5057e2ed8f27
Author:     Paul Gortmaker <[EMAIL PROTECTED]>
AuthorDate: Thu Jan 24 18:41:28 2008 -0500
Committer:  Kumar Gala <[EMAIL PROTECTED]>
CommitDate: Mon Jan 28 08:30:52 2008 -0600

    [POWERPC] 85xx: Add v1 device tree source for Wind River SBC8548 board
    
    This adds a v1 device tree source for the Wind River SBC8548 board.
    The biggest difference between this and the MPC8548CDS reference
    platform is the absence of the CDS's Arcadia peripherals and physical
    access to the PCI#2 bus.
    
    Signed-off-by: Paul Gortmaker <[EMAIL PROTECTED]>
    Signed-off-by: Kumar Gala <[EMAIL PROTECTED]>
---
 arch/powerpc/boot/dts/sbc8548.dts |  244 +++++++++++++++++++++++++++++++++++++
 1 files changed, 244 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/boot/dts/sbc8548.dts 
b/arch/powerpc/boot/dts/sbc8548.dts
new file mode 100644
index 0000000..14be38a
--- /dev/null
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -0,0 +1,244 @@
+/*
+ * SBC8548 Device Tree Source
+ *
+ * Copyright 2007 Wind River Systems Inc.
+ *
+ * Paul Gortmaker (see MAINTAINERS for contact information)
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+
+
+/dts-v1/;
+
+/ {
+       model = "SBC8548";
+       compatible = "SBC8548";
+       #address-cells = <1>;
+       #size-cells = <1>;
+
+       aliases {
+               ethernet0 = &enet0;
+               ethernet1 = &enet1;
+               serial0 = &serial0;
+               serial1 = &serial1;
+               pci0 = &pci0;
+               /* pci1 doesn't have a corresponding physical connector */
+               pci2 = &pci2;
+       };
+
+       cpus {
+               #address-cells = <1>;
+               #size-cells = <0>;
+
+               PowerPC,[EMAIL PROTECTED] {
+                       device_type = "cpu";
+                       reg = <0>;
+                       d-cache-line-size = <0x20>;     // 32 bytes
+                       i-cache-line-size = <0x20>;     // 32 bytes
+                       d-cache-size = <0x8000>;        // L1, 32K
+                       i-cache-size = <0x8000>;        // L1, 32K
+                       timebase-frequency = <0>;       // From uboot
+                       bus-frequency = <0>;
+                       clock-frequency = <0>;
+               };
+       };
+
+       memory {
+               device_type = "memory";
+               reg = <0x00000000 0x10000000>;
+       };
+
+       [EMAIL PROTECTED] {
+               #address-cells = <1>;
+               #size-cells = <1>;
+               device_type = "soc";
+               ranges = <0x00000000 0xe0000000 0x00100000>;
+               reg = <0xe0000000 0x00001000>;  // CCSRBAR
+               bus-frequency = <0>;
+
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,8548-memory-controller";
+                       reg = <0x2000 0x1000>;
+                       interrupt-parent = <&mpic>;
+                       interrupts = <0x12 0x2>;
+               };
+
+               [EMAIL PROTECTED] {
+                       compatible = "fsl,8548-l2-cache-controller";
+                       reg = <0x20000 0x1000>;
+                       cache-line-size = <0x20>;       // 32 bytes
+                       cache-size = <0x80000>; // L2, 512K
+                       interrupt-parent = <&mpic>;
+                       interrupts = <0x10 0x2>;
+               };
+
+               [EMAIL PROTECTED] {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       cell-index = <0>;
+                       compatible = "fsl-i2c";
+                       reg = <0x3000 0x100>;
+                       interrupts = <0x2b 0x2>;
+                       interrupt-parent = <&mpic>;
+                       dfsrr;
+               };
+
+               [EMAIL PROTECTED] {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       cell-index = <1>;
+                       compatible = "fsl-i2c";
+                       reg = <0x3100 0x100>;
+                       interrupts = <0x2b 0x2>;
+                       interrupt-parent = <&mpic>;
+                       dfsrr;
+               };
+
+               [EMAIL PROTECTED] {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       compatible = "fsl,gianfar-mdio";
+                       reg = <0x24520 0x20>;
+
+                       phy0: [EMAIL PROTECTED] {
+                               interrupt-parent = <&mpic>;
+                               interrupts = <0x6 0x1>;
+                               reg = <0x19>;
+                               device_type = "ethernet-phy";
+                       };
+                       phy1: [EMAIL PROTECTED] {
+                               interrupt-parent = <&mpic>;
+                               interrupts = <0x7 0x1>;
+                               reg = <0x1a>;
+                               device_type = "ethernet-phy";
+                       };
+               };
+
+               enet0: [EMAIL PROTECTED] {
+                       cell-index = <0>;
+                       device_type = "network";
+                       model = "eTSEC";
+                       compatible = "gianfar";
+                       reg = <0x24000 0x1000>;
+                       local-mac-address = [ 00 00 00 00 00 00 ];
+                       interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
+                       interrupt-parent = <&mpic>;
+                       phy-handle = <&phy0>;
+               };
+
+               enet1: [EMAIL PROTECTED] {
+                       cell-index = <1>;
+                       device_type = "network";
+                       model = "eTSEC";
+                       compatible = "gianfar";
+                       reg = <0x25000 0x1000>;
+                       local-mac-address = [ 00 00 00 00 00 00 ];
+                       interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
+                       interrupt-parent = <&mpic>;
+                       phy-handle = <&phy1>;
+               };
+
+               serial0: [EMAIL PROTECTED] {
+                       cell-index = <0>;
+                       device_type = "serial";
+                       compatible = "ns16550";
+                       reg = <0x4500 0x100>;   // reg base, size
+                       clock-frequency = <0>;  // should we fill in in uboot?
+                       interrupts = <0x2a 0x2>;
+                       interrupt-parent = <&mpic>;
+               };
+
+               serial1: [EMAIL PROTECTED] {
+                       cell-index = <1>;
+                       device_type = "serial";
+                       compatible = "ns16550";
+                       reg = <0x4600 0x100>;   // reg base, size
+                       clock-frequency = <0>;  // should we fill in in uboot?
+                       interrupts = <0x2a 0x2>;
+                       interrupt-parent = <&mpic>;
+               };
+
+               [EMAIL PROTECTED] {     //global utilities reg
+                       compatible = "fsl,mpc8548-guts";
+                       reg = <0xe0000 0x1000>;
+                       fsl,has-rstcr;
+               };
+
+               mpic: [EMAIL PROTECTED] {
+                       interrupt-controller;
+                       #address-cells = <0>;
+                       #size-cells = <0>;
+                       #interrupt-cells = <2>;
+                       reg = <0x40000 0x40000>;
+                       compatible = "chrp,open-pic";
+                       device_type = "open-pic";
+                        big-endian;
+               };
+       };
+
+       pci0: [EMAIL PROTECTED] {
+               cell-index = <0>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+                       /* IDSEL 0x01 (PCI-X slot) */
+                       0x0800 0x0 0x0 0x1 &mpic 0x0 0x1
+                       0x0800 0x0 0x0 0x2 &mpic 0x1 0x1
+                       0x0800 0x0 0x0 0x3 &mpic 0x2 0x1
+                       0x0800 0x0 0x0 0x4 &mpic 0x3 0x1>;
+
+               interrupt-parent = <&mpic>;
+               interrupts = <0x18 0x2>;
+               bus-range = <0 0>;
+               ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x10000000
+                         0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00800000>;
+               clock-frequency = <66666666>;
+               #interrupt-cells = <1>;
+               #size-cells = <2>;
+               #address-cells = <3>;
+               reg = <0xe0008000 0x1000>;
+               compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
+               device_type = "pci";
+       };
+
+       pci2: [EMAIL PROTECTED] {
+               cell-index = <2>;
+               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+               interrupt-map = <
+
+                       /* IDSEL 0x0 (PEX) */
+                       0x0000 0x0 0x0 0x1 &mpic 0x0 0x1
+                       0x0000 0x0 0x0 0x2 &mpic 0x1 0x1
+                       0x0000 0x0 0x0 0x3 &mpic 0x2 0x1
+                       0x0000 0x0 0x0 0x4 &mpic 0x3 0x1>;
+
+               interrupt-parent = <&mpic>;
+               interrupts = <0x1a 0x2>;
+               bus-range = <0x0 0xff>;
+               ranges = <0x02000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
+                         0x01000000 0x0 0x00000000 0xe3000000 0x0 0x08000000>;
+               clock-frequency = <33333333>;
+               #interrupt-cells = <1>;
+               #size-cells = <2>;
+               #address-cells = <3>;
+               reg = <0xe000a000 0x1000>;
+               compatible = "fsl,mpc8548-pcie";
+               device_type = "pci";
+               [EMAIL PROTECTED] {
+                       reg = <0x0 0x0 0x0 0x0 0x0>;
+                       #size-cells = <2>;
+                       #address-cells = <3>;
+                       device_type = "pci";
+                       ranges = <0x02000000 0x0 0xa0000000
+                                 0x02000000 0x0 0xa0000000
+                                 0x0 0x20000000
+
+                                 0x01000000 0x0 0x00000000
+                                 0x01000000 0x0 0x00000000
+                                 0x0 0x08000000>;
+               };
+       };
+};
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