Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=fa3218d8594869b38b1a170ea36d176ac455b897
Commit:     fa3218d8594869b38b1a170ea36d176ac455b897
Parent:     e83aff58bf1b7e6b355a0cfa206e9d3aebe5623f
Author:     Guennadi Liakhovetski <[EMAIL PROTECTED]>
AuthorDate: Tue Jan 29 15:43:13 2008 +0100
Committer:  Russell King <[EMAIL PROTECTED]>
CommitDate: Mon Feb 4 13:16:39 2008 +0000

    [ARM] 4660/3: at91: allow selecting UART for early kernel messages
    
    Currently early kernel messages, i.e., those from uncompression, go to the
    debugging UART. And if it is enabled in the platform configuration, but
    not initialized by the bootloader, the machine hangs, waiting for UART
    status change. Besides, having those messages on another UART - typically
    the console UART - may be preferrable. This patch allows selecting the
    UART in kernel configuration.
    
    Signed-off-by: Guennadi Liakhovetski <[EMAIL PROTECTED]>
    Acked-by: Andrew Victor <[EMAIL PROTECTED]>
    Signed-off-by: Russell King <[EMAIL PROTECTED]>
---
 arch/arm/mach-at91/Kconfig              |   30 +++++++
 drivers/serial/atmel_serial.c           |    3 +-
 drivers/serial/atmel_serial.h           |  127 -------------------------------
 include/asm-arm/arch-at91/at91rm9200.h  |    5 +
 include/asm-arm/arch-at91/at91sam9260.h |    7 ++
 include/asm-arm/arch-at91/at91sam9261.h |    4 +
 include/asm-arm/arch-at91/at91sam9263.h |    4 +
 include/asm-arm/arch-at91/at91sam9rl.h  |    5 +
 include/asm-arm/arch-at91/uncompress.h  |   32 ++++++--
 include/linux/atmel_serial.h            |  127 +++++++++++++++++++++++++++++++
 10 files changed, 207 insertions(+), 137 deletions(-)

diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index 5b0422c..074dcd5 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -253,6 +253,36 @@ config AT91_TIMER_HZ
          system clock (of at least several MHz), rounding is less of a
          problem so it can be safer to use a decimal values like 100.
 
+choice
+       prompt "Select a UART for early kernel messages"
+
+config AT91_EARLY_DBGU
+       bool "DBGU"
+
+config AT91_EARLY_USART0
+       bool "USART0"
+
+config AT91_EARLY_USART1
+       bool "USART1"
+
+config AT91_EARLY_USART2
+       bool "USART2"
+       depends on ! ARCH_AT91X40
+
+config AT91_EARLY_USART3
+       bool "USART3"
+       depends on (ARCH_AT91RM9200 || ARCH_AT91SAM9RL || ARCH_AT91SAM9260)
+
+config AT91_EARLY_USART4
+       bool "USART4"
+       depends on ARCH_AT91SAM9260
+
+config AT91_EARLY_USART5
+       bool "USART5"
+       depends on ARCH_AT91SAM9260
+
+endchoice
+
 endmenu
 
 endif
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index 111da57..60f5290 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -34,6 +34,7 @@
 #include <linux/tty_flip.h>
 #include <linux/platform_device.h>
 #include <linux/atmel_pdc.h>
+#include <linux/atmel_serial.h>
 
 #include <asm/io.h>
 
@@ -45,8 +46,6 @@
 #include <asm/arch/gpio.h>
 #endif
 
-#include "atmel_serial.h"
-
 #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
 #endif
diff --git a/drivers/serial/atmel_serial.h b/drivers/serial/atmel_serial.h
deleted file mode 100644
index e014177..0000000
--- a/drivers/serial/atmel_serial.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * drivers/serial/atmel_serial.h
- *
- * Copyright (C) 2005 Ivan Kokshaysky
- * Copyright (C) SAN People
- *
- * USART registers.
- * Based on AT91RM9200 datasheet revision E.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- */
-
-#ifndef ATMEL_SERIAL_H
-#define ATMEL_SERIAL_H
-
-#define ATMEL_US_CR            0x00                    /* Control Register */
-#define                ATMEL_US_RSTRX          (1 <<  2)               /* 
Reset Receiver */
-#define                ATMEL_US_RSTTX          (1 <<  3)               /* 
Reset Transmitter */
-#define                ATMEL_US_RXEN           (1 <<  4)               /* 
Receiver Enable */
-#define                ATMEL_US_RXDIS          (1 <<  5)               /* 
Receiver Disable */
-#define                ATMEL_US_TXEN           (1 <<  6)               /* 
Transmitter Enable */
-#define                ATMEL_US_TXDIS          (1 <<  7)               /* 
Transmitter Disable */
-#define                ATMEL_US_RSTSTA         (1 <<  8)               /* 
Reset Status Bits */
-#define                ATMEL_US_STTBRK         (1 <<  9)               /* 
Start Break */
-#define                ATMEL_US_STPBRK         (1 << 10)               /* Stop 
Break */
-#define                ATMEL_US_STTTO          (1 << 11)               /* 
Start Time-out */
-#define                ATMEL_US_SENDA          (1 << 12)               /* Send 
Address */
-#define                ATMEL_US_RSTIT          (1 << 13)               /* 
Reset Iterations */
-#define                ATMEL_US_RSTNACK        (1 << 14)               /* 
Reset Non Acknowledge */
-#define                ATMEL_US_RETTO          (1 << 15)               /* 
Rearm Time-out */
-#define                ATMEL_US_DTREN          (1 << 16)               /* Data 
Terminal Ready Enable [AT91RM9200 only] */
-#define                ATMEL_US_DTRDIS         (1 << 17)               /* Data 
Terminal Ready Disable [AT91RM9200 only] */
-#define                ATMEL_US_RTSEN          (1 << 18)               /* 
Request To Send Enable */
-#define                ATMEL_US_RTSDIS         (1 << 19)               /* 
Request To Send Disable */
-
-#define ATMEL_US_MR            0x04                    /* Mode Register */
-#define                ATMEL_US_USMODE         (0xf <<  0)             /* Mode 
of the USART */
-#define                        ATMEL_US_USMODE_NORMAL          0
-#define                        ATMEL_US_USMODE_RS485           1
-#define                        ATMEL_US_USMODE_HWHS            2
-#define                        ATMEL_US_USMODE_MODEM           3
-#define                        ATMEL_US_USMODE_ISO7816_T0      4
-#define                        ATMEL_US_USMODE_ISO7816_T1      6
-#define                        ATMEL_US_USMODE_IRDA            8
-#define                ATMEL_US_USCLKS         (3   <<  4)             /* 
Clock Selection */
-#define                        ATMEL_US_USCLKS_MCK             (0 <<  4)
-#define                        ATMEL_US_USCLKS_MCK_DIV8        (1 <<  4)
-#define                        ATMEL_US_USCLKS_SCK             (3 <<  4)
-#define                ATMEL_US_CHRL           (3   <<  6)             /* 
Character Length */
-#define                        ATMEL_US_CHRL_5                 (0 <<  6)
-#define                        ATMEL_US_CHRL_6                 (1 <<  6)
-#define                        ATMEL_US_CHRL_7                 (2 <<  6)
-#define                        ATMEL_US_CHRL_8                 (3 <<  6)
-#define                ATMEL_US_SYNC           (1 <<  8)               /* 
Synchronous Mode Select */
-#define                ATMEL_US_PAR            (7 <<  9)               /* 
Parity Type */
-#define                        ATMEL_US_PAR_EVEN               (0 <<  9)
-#define                        ATMEL_US_PAR_ODD                (1 <<  9)
-#define                        ATMEL_US_PAR_SPACE              (2 <<  9)
-#define                        ATMEL_US_PAR_MARK               (3 <<  9)
-#define                        ATMEL_US_PAR_NONE               (4 <<  9)
-#define                        ATMEL_US_PAR_MULTI_DROP         (6 <<  9)
-#define                ATMEL_US_NBSTOP         (3 << 12)               /* 
Number of Stop Bits */
-#define                        ATMEL_US_NBSTOP_1               (0 << 12)
-#define                        ATMEL_US_NBSTOP_1_5             (1 << 12)
-#define                        ATMEL_US_NBSTOP_2               (2 << 12)
-#define                ATMEL_US_CHMODE         (3 << 14)               /* 
Channel Mode */
-#define                        ATMEL_US_CHMODE_NORMAL          (0 << 14)
-#define                        ATMEL_US_CHMODE_ECHO            (1 << 14)
-#define                        ATMEL_US_CHMODE_LOC_LOOP        (2 << 14)
-#define                        ATMEL_US_CHMODE_REM_LOOP        (3 << 14)
-#define                ATMEL_US_MSBF           (1 << 16)               /* Bit 
Order */
-#define                ATMEL_US_MODE9          (1 << 17)               /* 
9-bit Character Length */
-#define                ATMEL_US_CLKO           (1 << 18)               /* 
Clock Output Select */
-#define                ATMEL_US_OVER           (1 << 19)               /* 
Oversampling Mode */
-#define                ATMEL_US_INACK          (1 << 20)               /* 
Inhibit Non Acknowledge */
-#define                ATMEL_US_DSNACK         (1 << 21)               /* 
Disable Successive NACK */
-#define                ATMEL_US_MAX_ITER       (7 << 24)               /* Max 
Iterations */
-#define                ATMEL_US_FILTER         (1 << 28)               /* 
Infrared Receive Line Filter */
-
-#define ATMEL_US_IER           0x08                    /* Interrupt Enable 
Register */
-#define                ATMEL_US_RXRDY          (1 <<  0)               /* 
Receiver Ready */
-#define                ATMEL_US_TXRDY          (1 <<  1)               /* 
Transmitter Ready */
-#define                ATMEL_US_RXBRK          (1 <<  2)               /* 
Break Received / End of Break */
-#define                ATMEL_US_ENDRX          (1 <<  3)               /* End 
of Receiver Transfer */
-#define                ATMEL_US_ENDTX          (1 <<  4)               /* End 
of Transmitter Transfer */
-#define                ATMEL_US_OVRE           (1 <<  5)               /* 
Overrun Error */
-#define                ATMEL_US_FRAME          (1 <<  6)               /* 
Framing Error */
-#define                ATMEL_US_PARE           (1 <<  7)               /* 
Parity Error */
-#define                ATMEL_US_TIMEOUT        (1 <<  8)               /* 
Receiver Time-out */
-#define                ATMEL_US_TXEMPTY        (1 <<  9)               /* 
Transmitter Empty */
-#define                ATMEL_US_ITERATION      (1 << 10)               /* Max 
number of Repetitions Reached */
-#define                ATMEL_US_TXBUFE         (1 << 11)               /* 
Transmission Buffer Empty */
-#define                ATMEL_US_RXBUFF         (1 << 12)               /* 
Reception Buffer Full */
-#define                ATMEL_US_NACK           (1 << 13)               /* Non 
Acknowledge */
-#define                ATMEL_US_RIIC           (1 << 16)               /* Ring 
Indicator Input Change [AT91RM9200 only] */
-#define                ATMEL_US_DSRIC          (1 << 17)               /* Data 
Set Ready Input Change [AT91RM9200 only] */
-#define                ATMEL_US_DCDIC          (1 << 18)               /* Data 
Carrier Detect Input Change [AT91RM9200 only] */
-#define                ATMEL_US_CTSIC          (1 << 19)               /* 
Clear to Send Input Change */
-#define                ATMEL_US_RI             (1 << 20)               /* RI */
-#define                ATMEL_US_DSR            (1 << 21)               /* DSR 
*/
-#define                ATMEL_US_DCD            (1 << 22)               /* DCD 
*/
-#define                ATMEL_US_CTS            (1 << 23)               /* CTS 
*/
-
-#define ATMEL_US_IDR           0x0c                    /* Interrupt Disable 
Register */
-#define ATMEL_US_IMR           0x10                    /* Interrupt Mask 
Register */
-#define ATMEL_US_CSR           0x14                    /* Channel Status 
Register */
-#define ATMEL_US_RHR           0x18                    /* Receiver Holding 
Register */
-#define ATMEL_US_THR           0x1c                    /* Transmitter Holding 
Register */
-#define                ATMEL_US_SYNH           (1 << 15)               /* 
Transmit/Receive Sync [AT91SAM9261 only] */
-
-#define ATMEL_US_BRGR          0x20                    /* Baud Rate Generator 
Register */
-#define                ATMEL_US_CD             (0xffff << 0)           /* 
Clock Divider */
-
-#define ATMEL_US_RTOR          0x24                    /* Receiver Time-out 
Register */
-#define                ATMEL_US_TO             (0xffff << 0)           /* 
Time-out Value */
-
-#define ATMEL_US_TTGR          0x28                    /* Transmitter 
Timeguard Register */
-#define                ATMEL_US_TG             (0xff << 0)             /* 
Timeguard Value */
-
-#define ATMEL_US_FIDI          0x40                    /* FI DI Ratio Register 
*/
-#define ATMEL_US_NER           0x44                    /* Number of Errors 
Register */
-#define ATMEL_US_IF            0x4c                    /* IrDA Filter Register 
*/
-
-#endif
diff --git a/include/asm-arm/arch-at91/at91rm9200.h 
b/include/asm-arm/arch-at91/at91rm9200.h
index 802891a..e8fc0b1 100644
--- a/include/asm-arm/arch-at91/at91rm9200.h
+++ b/include/asm-arm/arch-at91/at91rm9200.h
@@ -93,6 +93,11 @@
 #define AT91_RTC       (0xfffffe00 - AT91_BASE_SYS)    /* Real-Time Clock */
 #define AT91_MC                (0xffffff00 - AT91_BASE_SYS)    /* Memory 
Controllers */
 
+#define AT91_USART0    AT91RM9200_BASE_US0
+#define AT91_USART1    AT91RM9200_BASE_US1
+#define AT91_USART2    AT91RM9200_BASE_US2
+#define AT91_USART3    AT91RM9200_BASE_US3
+
 #define AT91_MATRIX    0       /* not supported */
 
 /*
diff --git a/include/asm-arm/arch-at91/at91sam9260.h 
b/include/asm-arm/arch-at91/at91sam9260.h
index 0427f86..c8934fe 100644
--- a/include/asm-arm/arch-at91/at91sam9260.h
+++ b/include/asm-arm/arch-at91/at91sam9260.h
@@ -99,6 +99,13 @@
 #define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR      (0xfffffd50 - AT91_BASE_SYS)
 
+#define AT91_USART0    AT91SAM9260_BASE_US0
+#define AT91_USART1    AT91SAM9260_BASE_US1
+#define AT91_USART2    AT91SAM9260_BASE_US2
+#define AT91_USART3    AT91SAM9260_BASE_US3
+#define AT91_USART4    AT91SAM9260_BASE_US4
+#define AT91_USART5    AT91SAM9260_BASE_US5
+
 
 /*
  * Internal Memory.
diff --git a/include/asm-arm/arch-at91/at91sam9261.h 
b/include/asm-arm/arch-at91/at91sam9261.h
index 9eb4595..c7c4778 100644
--- a/include/asm-arm/arch-at91/at91sam9261.h
+++ b/include/asm-arm/arch-at91/at91sam9261.h
@@ -84,6 +84,10 @@
 #define AT91_WDT       (0xfffffd40 - AT91_BASE_SYS)
 #define AT91_GPBR      (0xfffffd50 - AT91_BASE_SYS)
 
+#define AT91_USART0    AT91SAM9261_BASE_US0
+#define AT91_USART1    AT91SAM9261_BASE_US1
+#define AT91_USART2    AT91SAM9261_BASE_US2
+
 
 /*
  * Internal Memory.
diff --git a/include/asm-arm/arch-at91/at91sam9263.h 
b/include/asm-arm/arch-at91/at91sam9263.h
index 115c47a..018a647 100644
--- a/include/asm-arm/arch-at91/at91sam9263.h
+++ b/include/asm-arm/arch-at91/at91sam9263.h
@@ -101,6 +101,10 @@
 #define AT91_RTT1      (0xfffffd50 - AT91_BASE_SYS)
 #define AT91_GPBR      (0xfffffd60 - AT91_BASE_SYS)
 
+#define AT91_USART0    AT91SAM9263_BASE_US0
+#define AT91_USART1    AT91SAM9263_BASE_US1
+#define AT91_USART2    AT91SAM9263_BASE_US2
+
 #define AT91_SMC       AT91_SMC0
 
 /*
diff --git a/include/asm-arm/arch-at91/at91sam9rl.h 
b/include/asm-arm/arch-at91/at91sam9rl.h
index 8a9708a..16d2832 100644
--- a/include/asm-arm/arch-at91/at91sam9rl.h
+++ b/include/asm-arm/arch-at91/at91sam9rl.h
@@ -94,6 +94,11 @@
 #define AT91_GPBR      (0xfffffd60 - AT91_BASE_SYS)
 #define AT91_RTC       (0xfffffe00 - AT91_BASE_SYS)
 
+#define AT91_USART0    AT91SAM9RL_BASE_US0
+#define AT91_USART1    AT91SAM9RL_BASE_US1
+#define AT91_USART2    AT91SAM9RL_BASE_US2
+#define AT91_USART3    AT91SAM9RL_BASE_US3
+
 
 /*
  * Internal Memory.
diff --git a/include/asm-arm/arch-at91/uncompress.h 
b/include/asm-arm/arch-at91/uncompress.h
index 272a7e0..f5636a8 100644
--- a/include/asm-arm/arch-at91/uncompress.h
+++ b/include/asm-arm/arch-at91/uncompress.h
@@ -22,7 +22,23 @@
 #define __ASM_ARCH_UNCOMPRESS_H
 
 #include <asm/io.h>
-#include <asm/arch/at91_dbgu.h>
+#include <linux/atmel_serial.h>
+
+#if defined(CONFIG_AT91_EARLY_DBGU)
+#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS)
+#elif defined(CONFIG_AT91_EARLY_USART0)
+#define UART_OFFSET AT91_USART0
+#elif defined(CONFIG_AT91_EARLY_USART1)
+#define UART_OFFSET AT91_USART1
+#elif defined(CONFIG_AT91_EARLY_USART2)
+#define UART_OFFSET AT91_USART2
+#elif defined(CONFIG_AT91_EARLY_USART3)
+#define UART_OFFSET AT91_USART3
+#elif defined(CONFIG_AT91_EARLY_USART4)
+#define UART_OFFSET AT91_USART4
+#elif defined(CONFIG_AT91_EARLY_USART5)
+#define UART_OFFSET AT91_USART5
+#endif
 
 /*
  * The following code assumes the serial port has already been
@@ -33,22 +49,22 @@
  */
 static void putc(int c)
 {
-#ifdef AT91_DBGU
-       void __iomem *sys = (void __iomem *) AT91_BASE_SYS;     /* physical 
address */
+#ifdef UART_OFFSET
+       void __iomem *sys = (void __iomem *) UART_OFFSET;       /* physical 
address */
 
-       while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY))
+       while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY))
                barrier();
-       __raw_writel(c, sys + AT91_DBGU_THR);
+       __raw_writel(c, sys + ATMEL_US_THR);
 #endif
 }
 
 static inline void flush(void)
 {
-#ifdef AT91_DBGU
-       void __iomem *sys = (void __iomem *) AT91_BASE_SYS;     /* physical 
address */
+#ifdef UART_OFFSET
+       void __iomem *sys = (void __iomem *) UART_OFFSET;       /* physical 
address */
 
        /* wait for transmission to complete */
-       while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY))
+       while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
                barrier();
 #endif
 }
diff --git a/include/linux/atmel_serial.h b/include/linux/atmel_serial.h
new file mode 100644
index 0000000..fd68337
--- /dev/null
+++ b/include/linux/atmel_serial.h
@@ -0,0 +1,127 @@
+/*
+ * include/linux/atmel_serial.h
+ *
+ * Copyright (C) 2005 Ivan Kokshaysky
+ * Copyright (C) SAN People
+ *
+ * USART registers.
+ * Based on AT91RM9200 datasheet revision E.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef ATMEL_SERIAL_H
+#define ATMEL_SERIAL_H
+
+#define ATMEL_US_CR            0x00                    /* Control Register */
+#define                ATMEL_US_RSTRX          (1 <<  2)               /* 
Reset Receiver */
+#define                ATMEL_US_RSTTX          (1 <<  3)               /* 
Reset Transmitter */
+#define                ATMEL_US_RXEN           (1 <<  4)               /* 
Receiver Enable */
+#define                ATMEL_US_RXDIS          (1 <<  5)               /* 
Receiver Disable */
+#define                ATMEL_US_TXEN           (1 <<  6)               /* 
Transmitter Enable */
+#define                ATMEL_US_TXDIS          (1 <<  7)               /* 
Transmitter Disable */
+#define                ATMEL_US_RSTSTA         (1 <<  8)               /* 
Reset Status Bits */
+#define                ATMEL_US_STTBRK         (1 <<  9)               /* 
Start Break */
+#define                ATMEL_US_STPBRK         (1 << 10)               /* Stop 
Break */
+#define                ATMEL_US_STTTO          (1 << 11)               /* 
Start Time-out */
+#define                ATMEL_US_SENDA          (1 << 12)               /* Send 
Address */
+#define                ATMEL_US_RSTIT          (1 << 13)               /* 
Reset Iterations */
+#define                ATMEL_US_RSTNACK        (1 << 14)               /* 
Reset Non Acknowledge */
+#define                ATMEL_US_RETTO          (1 << 15)               /* 
Rearm Time-out */
+#define                ATMEL_US_DTREN          (1 << 16)               /* Data 
Terminal Ready Enable [AT91RM9200 only] */
+#define                ATMEL_US_DTRDIS         (1 << 17)               /* Data 
Terminal Ready Disable [AT91RM9200 only] */
+#define                ATMEL_US_RTSEN          (1 << 18)               /* 
Request To Send Enable */
+#define                ATMEL_US_RTSDIS         (1 << 19)               /* 
Request To Send Disable */
+
+#define ATMEL_US_MR            0x04                    /* Mode Register */
+#define                ATMEL_US_USMODE         (0xf <<  0)             /* Mode 
of the USART */
+#define                        ATMEL_US_USMODE_NORMAL          0
+#define                        ATMEL_US_USMODE_RS485           1
+#define                        ATMEL_US_USMODE_HWHS            2
+#define                        ATMEL_US_USMODE_MODEM           3
+#define                        ATMEL_US_USMODE_ISO7816_T0      4
+#define                        ATMEL_US_USMODE_ISO7816_T1      6
+#define                        ATMEL_US_USMODE_IRDA            8
+#define                ATMEL_US_USCLKS         (3   <<  4)             /* 
Clock Selection */
+#define                        ATMEL_US_USCLKS_MCK             (0 <<  4)
+#define                        ATMEL_US_USCLKS_MCK_DIV8        (1 <<  4)
+#define                        ATMEL_US_USCLKS_SCK             (3 <<  4)
+#define                ATMEL_US_CHRL           (3   <<  6)             /* 
Character Length */
+#define                        ATMEL_US_CHRL_5                 (0 <<  6)
+#define                        ATMEL_US_CHRL_6                 (1 <<  6)
+#define                        ATMEL_US_CHRL_7                 (2 <<  6)
+#define                        ATMEL_US_CHRL_8                 (3 <<  6)
+#define                ATMEL_US_SYNC           (1 <<  8)               /* 
Synchronous Mode Select */
+#define                ATMEL_US_PAR            (7 <<  9)               /* 
Parity Type */
+#define                        ATMEL_US_PAR_EVEN               (0 <<  9)
+#define                        ATMEL_US_PAR_ODD                (1 <<  9)
+#define                        ATMEL_US_PAR_SPACE              (2 <<  9)
+#define                        ATMEL_US_PAR_MARK               (3 <<  9)
+#define                        ATMEL_US_PAR_NONE               (4 <<  9)
+#define                        ATMEL_US_PAR_MULTI_DROP         (6 <<  9)
+#define                ATMEL_US_NBSTOP         (3 << 12)               /* 
Number of Stop Bits */
+#define                        ATMEL_US_NBSTOP_1               (0 << 12)
+#define                        ATMEL_US_NBSTOP_1_5             (1 << 12)
+#define                        ATMEL_US_NBSTOP_2               (2 << 12)
+#define                ATMEL_US_CHMODE         (3 << 14)               /* 
Channel Mode */
+#define                        ATMEL_US_CHMODE_NORMAL          (0 << 14)
+#define                        ATMEL_US_CHMODE_ECHO            (1 << 14)
+#define                        ATMEL_US_CHMODE_LOC_LOOP        (2 << 14)
+#define                        ATMEL_US_CHMODE_REM_LOOP        (3 << 14)
+#define                ATMEL_US_MSBF           (1 << 16)               /* Bit 
Order */
+#define                ATMEL_US_MODE9          (1 << 17)               /* 
9-bit Character Length */
+#define                ATMEL_US_CLKO           (1 << 18)               /* 
Clock Output Select */
+#define                ATMEL_US_OVER           (1 << 19)               /* 
Oversampling Mode */
+#define                ATMEL_US_INACK          (1 << 20)               /* 
Inhibit Non Acknowledge */
+#define                ATMEL_US_DSNACK         (1 << 21)               /* 
Disable Successive NACK */
+#define                ATMEL_US_MAX_ITER       (7 << 24)               /* Max 
Iterations */
+#define                ATMEL_US_FILTER         (1 << 28)               /* 
Infrared Receive Line Filter */
+
+#define ATMEL_US_IER           0x08                    /* Interrupt Enable 
Register */
+#define                ATMEL_US_RXRDY          (1 <<  0)               /* 
Receiver Ready */
+#define                ATMEL_US_TXRDY          (1 <<  1)               /* 
Transmitter Ready */
+#define                ATMEL_US_RXBRK          (1 <<  2)               /* 
Break Received / End of Break */
+#define                ATMEL_US_ENDRX          (1 <<  3)               /* End 
of Receiver Transfer */
+#define                ATMEL_US_ENDTX          (1 <<  4)               /* End 
of Transmitter Transfer */
+#define                ATMEL_US_OVRE           (1 <<  5)               /* 
Overrun Error */
+#define                ATMEL_US_FRAME          (1 <<  6)               /* 
Framing Error */
+#define                ATMEL_US_PARE           (1 <<  7)               /* 
Parity Error */
+#define                ATMEL_US_TIMEOUT        (1 <<  8)               /* 
Receiver Time-out */
+#define                ATMEL_US_TXEMPTY        (1 <<  9)               /* 
Transmitter Empty */
+#define                ATMEL_US_ITERATION      (1 << 10)               /* Max 
number of Repetitions Reached */
+#define                ATMEL_US_TXBUFE         (1 << 11)               /* 
Transmission Buffer Empty */
+#define                ATMEL_US_RXBUFF         (1 << 12)               /* 
Reception Buffer Full */
+#define                ATMEL_US_NACK           (1 << 13)               /* Non 
Acknowledge */
+#define                ATMEL_US_RIIC           (1 << 16)               /* Ring 
Indicator Input Change [AT91RM9200 only] */
+#define                ATMEL_US_DSRIC          (1 << 17)               /* Data 
Set Ready Input Change [AT91RM9200 only] */
+#define                ATMEL_US_DCDIC          (1 << 18)               /* Data 
Carrier Detect Input Change [AT91RM9200 only] */
+#define                ATMEL_US_CTSIC          (1 << 19)               /* 
Clear to Send Input Change */
+#define                ATMEL_US_RI             (1 << 20)               /* RI */
+#define                ATMEL_US_DSR            (1 << 21)               /* DSR 
*/
+#define                ATMEL_US_DCD            (1 << 22)               /* DCD 
*/
+#define                ATMEL_US_CTS            (1 << 23)               /* CTS 
*/
+
+#define ATMEL_US_IDR           0x0c                    /* Interrupt Disable 
Register */
+#define ATMEL_US_IMR           0x10                    /* Interrupt Mask 
Register */
+#define ATMEL_US_CSR           0x14                    /* Channel Status 
Register */
+#define ATMEL_US_RHR           0x18                    /* Receiver Holding 
Register */
+#define ATMEL_US_THR           0x1c                    /* Transmitter Holding 
Register */
+#define                ATMEL_US_SYNH           (1 << 15)               /* 
Transmit/Receive Sync [AT91SAM9261 only] */
+
+#define ATMEL_US_BRGR          0x20                    /* Baud Rate Generator 
Register */
+#define                ATMEL_US_CD             (0xffff << 0)           /* 
Clock Divider */
+
+#define ATMEL_US_RTOR          0x24                    /* Receiver Time-out 
Register */
+#define                ATMEL_US_TO             (0xffff << 0)           /* 
Time-out Value */
+
+#define ATMEL_US_TTGR          0x28                    /* Transmitter 
Timeguard Register */
+#define                ATMEL_US_TG             (0xff << 0)             /* 
Timeguard Value */
+
+#define ATMEL_US_FIDI          0x40                    /* FI DI Ratio Register 
*/
+#define ATMEL_US_NER           0x44                    /* Number of Errors 
Register */
+#define ATMEL_US_IF            0x4c                    /* IrDA Filter Register 
*/
+
+#endif
-
To unsubscribe from this list: send the line "unsubscribe git-commits-head" in
the body of a message to [EMAIL PROTECTED]
More majordomo info at  http://vger.kernel.org/majordomo-info.html

Reply via email to