Gitweb:     
http://git.kernel.org/git/?p=linux/kernel/git/torvalds/linux-2.6.git;a=commit;h=9585ca02f8f9e844b64e7ff4d167ccc1390a99ab
Commit:     9585ca02f8f9e844b64e7ff4d167ccc1390a99ab
Parent:     19af35546de68c872dcb687613e0902a602cb20e
Author:     Matthew Wilcox <[EMAIL PROTECTED]>
AuthorDate: Sun Feb 10 23:18:15 2008 -0500
Committer:  Linus Torvalds <[EMAIL PROTECTED]>
CommitDate: Mon Feb 11 08:15:03 2008 -0800

    Use proper abstractions in quirk_intel_irqbalance
    
    Since we may not have a pci_dev for the device we need to access, we can't
    use pci_read_config_word.  But raw_pci_read is an internal implementation
    detail; it's better to use the architected pci_bus_read_config_word
    interface.  Using PCI_DEVFN instead of a mysterious constant helps
    reassure everyone that we really do intend to access device 8.
    
    [ Thanks to Grant Grundler for pointing out to me that this is exactly
      what the write immediately above this is doing -- enabling device 8 to
      respond to config space cycles.
                                        - Matthew
    
      Grant also says:
    
        "Can you also add a comment which points at the Intel
         documentation?
    
         The 'Intel E7320 Memory Controller Hub (MCH) Datasheet' at
    
          http://download.intel.com/design/chipsets/datashts/30300702.pdf
    
         Page 69 documents register F4h (DEVPRES1).
    
         And I just doubled checked that the 0xf4 register value is
         restored later in the quirk (obvious when you look at the code
         but not from the patch"
    
      so here it is.
                                         - Linus ]
    
    Signed-off-by: Matthew Wilcox <[EMAIL PROTECTED]>
    Acked-by: Grant Grundler <[EMAIL PROTECTED]>
    Signed-off-by: Linus Torvalds <[EMAIL PROTECTED]>
---
 arch/x86/kernel/quirks.c |    9 ++++++---
 1 files changed, 6 insertions(+), 3 deletions(-)

diff --git a/arch/x86/kernel/quirks.c b/arch/x86/kernel/quirks.c
index 1941482..c47208f 100644
--- a/arch/x86/kernel/quirks.c
+++ b/arch/x86/kernel/quirks.c
@@ -11,7 +11,7 @@
 static void __devinit quirk_intel_irqbalance(struct pci_dev *dev)
 {
        u8 config, rev;
-       u32 word;
+       u16 word;
 
        /* BIOS may enable hardware IRQ balancing for
         * E7520/E7320/E7525(revision ID 0x9 and below)
@@ -26,8 +26,11 @@ static void __devinit quirk_intel_irqbalance(struct pci_dev 
*dev)
        pci_read_config_byte(dev, 0xf4, &config);
        pci_write_config_byte(dev, 0xf4, config|0x2);
 
-       /* read xTPR register */
-       raw_pci_read(0, 0, 0x40, 0x4c, 2, &word);
+       /*
+        * read xTPR register.  We may not have a pci_dev for device 8
+        * because it might be hidden until the above write.
+        */
+       pci_bus_read_config_word(dev->bus, PCI_DEVFN(8, 0), 0x4c, &word);
 
        if (!(word & (1 << 13))) {
                dev_info(&dev->dev, "Intel E7520/7320/7525 detected; "
-
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