Commit:     959b3be64cab9160cd74532a49b89cdd918d38e9
Parent:     7343b3b3a627eb30e24e921f004f659c8ebb91c5
Author:     H. Peter Anvin <[EMAIL PROTECTED]>
AuthorDate: Thu Feb 14 14:56:45 2008 -0800
Committer:  Ingo Molnar <[EMAIL PROTECTED]>
CommitDate: Tue Feb 26 12:55:51 2008 +0100

    x86: don't use P6_NOPs if compiling with CONFIG_X86_GENERIC
    P6_NOPs are definitely not supported on some VIA CPUs, and possibly
    (unverified) on AMD K7s.  It is also the only thing that prevents a
    686 kernel from running on Transmeta TM3x00/5x00 (Crusoe) series.
    The performance benefit over generic NOPs is very small, so when
    building for generic consumption, avoid using them.
    Signed-off-by: H. Peter Anvin <[EMAIL PROTECTED]>
    Signed-off-by: Ingo Molnar <[EMAIL PROTECTED]>
    Signed-off-by: Thomas Gleixner <[EMAIL PROTECTED]>
 arch/x86/Kconfig.cpu |   11 ++++++++++-
 1 files changed, 10 insertions(+), 1 deletions(-)

diff --git a/arch/x86/Kconfig.cpu b/arch/x86/Kconfig.cpu
index 86fd2a0..6d50064 100644
--- a/arch/x86/Kconfig.cpu
+++ b/arch/x86/Kconfig.cpu
@@ -377,9 +377,18 @@ config X86_OOSTORE
        def_bool y
        depends on (MWINCHIP3D || MWINCHIP2 || MWINCHIPC6) && MTRR
+# P6_NOPs are a relatively minor optimization that require a family >=
+# 6 processor, except that it is broken on certain VIA chips.
+# Furthermore, AMD chips prefer a totally different sequence of NOPs
+# (which work on all CPUs).  As a result, disallow these if we're
+# compiling X86_GENERIC but not X86_64 (these NOPs do work on all
+# x86-64 capable chips); the list of processors in the right-hand clause
+# are the cores that benefit from this optimization.
 config X86_P6_NOP
        def_bool y
-       depends on (M686 || MPENTIUMII || MPENTIUMIII || MPENTIUMM || MCORE2 || 
+       depends on (X86_64 || !X86_GENERIC) && (M686 || MPENTIUMII || 
 config X86_TSC
        def_bool y
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