Junio C Hamano wrote:
> Jonathan Nieder <jrnie...@gmail.com> writes:

>> The big-endian part was just my idiocy, sorry.
> Hrm, do we want an update log message for 1/2 then?

Hm, I thought all the crazy had been eliminated already.

*looks again*

I guess "using a single 32-bit load" makes it sound like it's using a
big-endian load instead of a load followed by twiddling in registers.

Simplest fix would be to drop the phrase "by using a single 32-bit
load", leaving "... and gcc takes full advantage, resulting in a whole
bunch of unaligned access traps."  Would that work for you, or should
I resend?

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