wanweiqiangintel commented on PR #14674: URL: https://github.com/apache/arrow/pull/14674#issuecomment-1353024803
> Hi, @pitrou ,thank you for reviewing this PR. The AVX-512 instruction set consists of several separate sets each having their own unique CPUID feature bit. Intel ICX(ICE LAKEļ¼ 3rd generation Xeon Scalable server processors) introduced the AVX512VBMI2 for the first time.([https://en.wikipedia.org/wiki/AVX-512](url)) -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
