zanmato1984 commented on PR #40237: URL: https://github.com/apache/arrow/pull/40237#issuecomment-1966155493
Hi @bkietz , I had some bad news about the current approach. The current approach did prevent WW race by using atomic stores. The reading, however, is using plane memory load, thus leads to RW race (observable by TSAN, at this line https://github.com/apache/arrow/pull/40237/files#diff-5af65f049e302f76671ecbfc17b0f9c522ec94be291b2bcb442fa565d3607736R2006). Given that the reading is through `ArraySpan` and spread all over the compute component, it is not feasible to change every read to atomic load. So I have to turn to an alternative approach drafted in #40260, using DCLP which could prevent both WW and RW race conditions. Would you step to #40260 to take a look? (It's of course in draft and lacks tests of many other scalar types, but it would be nice to make agreement on the approach first) Once we have an agreement on the new approach, I'll close this PR and move on with the other. cc @pitrou -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
