mapleFU commented on code in PR #40374:
URL: https://github.com/apache/arrow/pull/40374#discussion_r1515576315
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docs/source/cpp/env_vars.rst:
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@@ -132,11 +132,15 @@ that changing their value later will have an effect.
.. envvar:: ARROW_USER_SIMD_LEVEL
- The SIMD optimization level to select. By default, Arrow C++ detects
- the capabilities of the current CPU at runtime and chooses the best
- execution paths based on that information. One can override the detection
- by setting this environment variable to a well-defined value.
- Supported values are:
+ The maximum SIMD optimization level selectable at runtime. Useful for
+ comparing the performance impact of enabling or disabling respective code
+ paths or working around situations where instructions are supported but are
+ either buggy or not performant.
Review Comment:
Just curious, what does `buggy` here means? ( I'm not familiar with SIMD ).
Would that's the case that the arch don't implement the instr well? Or just
don't have this instr, do user need disable it?
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docs/source/cpp/env_vars.rst:
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@@ -148,19 +152,29 @@ that changing their value later will have an effect.
platforms currently do not implement any form of runtime dispatch.
.. note::
- In addition to runtime dispatch, the compile-time SIMD level can
- be set using the ``ARROW_SIMD_LEVEL`` CMake configuration variable.
- Unlike runtime dispatch, compile-time SIMD optimizations cannot be
- changed at runtime (for example, if you compile Arrow C++ with AVX512
- enabled, the resulting binary will only run on AVX512-enabled CPUs).
- Setting ``ARROW_USER_SIMD_LEVEL=NONE`` prevents the execution of
- explicit SIMD optimization code, but it does not rule out the execution
- of compiler generated SIMD instructions. E.g., on x86_64 platform,
- Arrow is built with ``ARROW_SIMD_LEVEL=SSE4_2`` by default. Compiler
- may generate SSE4.2 instructions from any C/C++ source code. On legacy
- x86_64 platforms do not support SSE4.2, Arrow binary may fail with
- SIGILL (Illegal Instruction). User must rebuild Arrow and PyArrow from
- scratch by setting cmake option ``ARROW_SIMD_LEVEL=NONE``.
+ In addition to runtime dispatch, Arrow's build system supports two
+ compile-time CMake variables for controlling SIMD: ``ARROW_SIMD_LEVEL``
+ and ``ARROW_RUNTIME_SIMD_LEVEL``.
+
+ The ``ARROW_SIMD_LEVEL`` variable sets the minimum supported SIMD level
at
+ the compiler level. This works by passing the appropriate target
+ architecture flag, such as ``-march=haswell`` for AVX2, to the compiler.
+ Unlike runtime dispatch, compile-time SIMD optimizations cannot be
changed
+ at runtime (for example, if you compile Arrow C++ with AVX512 enabled,
the
+ resulting binary will only run on AVX512-enabled CPUs). Setting
+ ``ARROW_USER_SIMD_LEVEL=NONE`` prevents the execution of explicit SIMD
+ optimization code, but it does not rule out the execution of
+ compiler-generated SIMD instructions. E.g., on x86, Arrow is built with
+ ``ARROW_SIMD_LEVEL=SSE4_2`` by default. The compiler may generate SSE4.2
Review Comment:
Hmmm 🤔 A bit misleading here, since we've some hand-written SSE4.2 code, and
some compiler generated code using some auto-vectorization techniques?
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