gounthar commented on PR #49556: URL: https://github.com/apache/arrow/pull/49556#issuecomment-4091133921
@pitrou That's a fair concern. A few things that mitigate it: 1. **RISE runners are native hardware** — not QEMU emulation. Debugging and iteration is much faster (we validated the full Arrow C++ + pyarrow build on native hardware in ~1.5h total). 2. **I maintain two BananaPi F3 boards** running 24/7 as riscv64 build/test machines. Happy to help debug any riscv64-specific issues that come up. 3. **The riscv64 job would be additive** — if it breaks, it doesn't affect existing x86_64/aarch64 builds. Same as how aarch64 was initially added. 4. **Arrow C++ is already riscv64-compatible** (PR #13902, 2022). The risk of riscv64-specific breakage in the wheel pipeline is low since the code itself works — it's mainly CI plumbing. 5. **RISE is committed to maintaining riscv64 CI** for key projects. Ludovic Henry (RISE TSC Co-Chair) is actively providing runners and support — this isn't a fire-and-forget contribution. I'm also happy to be a point of contact for riscv64 issues in Arrow. I've been doing this across 30+ Python projects this week and can respond quickly. -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
