zhanchangbao-sanechips opened a new pull request, #51340:
URL: https://github.com/apache/arrow/pull/51340

   ### What changes were proposed in this pull request?
   Add initial RISC‑V Vector (RVV) support to Arrow C++. This mirrors the 
existing SVE dynamic‑dispatch support on AArch64, aves the way for upcoming 
RVV‑related optimizations, providing:
   - Runtime CPU capability detection for RVV and vector length   (VLEN = 
128/256/512 bits) on riscv64 Linux.
   - A `DispatchLevel::RVV` entry so RVV‑optimized kernels can be compiled with 
`-march=rv64gcv` and selected at runtime.
   - CMake flags: `ARROW_SIMD_LEVEL=RVV` for compile‑time RVV and 
`ARROW_RUNTIME_SIMD_LEVEL=RVV|MAX` for runtime dispatch, with graceful fallback 
(`NONE`) when the toolchain lacks RVV support.
   
   ### changes:
   - `cpp/src/arrow/util/cpu_info.h/.cc`: add 
`RVV/RVV128/RVV256/RVV512`hardware flags; detect V extension via 
`getauxval(AT_HWCAP)` and VLEN via the `vlenb` CSR on Linux/riscv64.
   - `cpp/src/arrow/util/dispatch_internal.h`: add `DispatchLevel::RVV` and 
`ARROW_DISPATCH_TARGET_RVV` macro, wired into
     `DynamicDispatch::IsSupported`.
   - `cpp/cmake_modules/DefineOptions.cmake`: add `RVV` to `ARROW_SIMD_LEVEL` 
and `ARROW_RUNTIME_SIMD_LEVEL` option lists.
   - `cpp/cmake_modules/SetupCxxFlags.cmake`: riscv64 handling — check 
`-march=rv64gcv`, set `ARROW_HAVE_RVV` (compile‑time) / 
`ARROW_HAVE_RUNTIME_RVV` (runtime), default `ARROW_SIMD_LEVEL=NONE`.
   - `cpp/src/arrow/util/simd.h`: include `<riscv_vector.h>` when RVV is 
enabled.
   - `cpp/src/arrow/util/io_util_test.cc`: extend `CpuInfo.Basic` to assert RVV 
detection and a matching VLEN flag.
   
   ### How was this patch tested?
   - Tested on a Sophgo SG2044 board with GCC 14.3.1.
   - Built with --DARROW_SIMD_LEVEL=RVV -DARROW_RUNTIME_SIMD_LEVEL=RVV, config 
passed.
   - All unittest passed.
   <img width="795" height="700" alt="20260915151437044" 
src="https://github.com/user-attachments/assets/72d44824-a3b2-4956-9cbd-2dea8230eb5e";
 />
   


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