alamb commented on code in PR #10136: URL: https://github.com/apache/arrow-rs/pull/10136#discussion_r4218099897
########## arrow-buffer/src/util/bit_util.rs: ########## @@ -19,6 +19,45 @@ use crate::bit_chunk_iterator::BitChunks; +/// Parallel bit extract: for each set bit in `mask`, extract the +/// corresponding bit from `value` and pack them contiguously into the low +/// bits of the return value. +/// +/// Equivalent to the x86 BMI2 `PEXT` instruction. When compiled with the +/// `bmi2` target feature enabled (for example `-C target-cpu=x86-64-v3`) +/// this lowers to the hardware `pext` instruction; otherwise it falls back +/// to a portable scalar loop. +// +// Replace with `value.compress(mask)` when `uint_gather_scatter_bits` is +// stabilised: <https://github.com/rust-lang/rust/issues/149069> +#[inline] +pub fn compress(value: u64, mask: u64) -> u64 { + #[cfg(all(target_arch = "x86_64", target_feature = "bmi2"))] + { + // SAFETY: the `bmi2` target feature is statically enabled for this + // build, so the `pext` instruction is guaranteed to be available. + unsafe { std::arch::x86_64::_pext_u64(value, mask) } + } + + #[cfg(not(all(target_arch = "x86_64", target_feature = "bmi2")))] + { + let mut mask = mask; + let mut result = 0_u64; + let mut dest_bit = 1_u64; + while mask != 0 { Review Comment: FYI, @mightsleep has been working on an approach that is similar here that is showing great promise - https://github.com/apache/arrow-rs/pull/11322 -- This is an automated message from the Apache Git Service. To respond to the message, please log on to GitHub and use the URL above to go to the specific comment. To unsubscribe, e-mail: [email protected] For queries about this service, please contact Infrastructure at: [email protected]
