#7192: Bug in -fregs-graph with -fnew-codegen
---------------------------------+------------------------------------------
Reporter: simonmar | Owner: benl
Type: bug | Status: new
Priority: highest | Milestone: 7.8.1
Component: Compiler | Version: 7.7
Keywords: | Os: Unknown/Multiple
Architecture: Unknown/Multiple | Failure: None/Unknown
Difficulty: Unknown | Testcase:
Blockedby: | Blocking: 4258
Related: |
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Comment(by benl):
... (continued from previous)... the cmm code for the sequence you had.
For this I compiled the Haskell code with `-Odph` to get array fusion and
`-fregs-graph` to turn the graph allocator back on.
{{{
desire:diophantine benl$ /Users/benl/devel/ghc/ghc-head-devel/inplace/bin
/ghc-stage2 \
-fforce-recomp -dcore-lint -dcmm-lint --make -o dph-diophantine-copy \
Main -Odph -fregs-graph -package dph-lifted-copy \
-ddump-cmmz-sp -ddump-asm -ddump-to-file
desire:diophantine benl$ ./dph-diophantine-copy
Stack space overflow: current size 8388608 bytes.
Use `+RTS -Ksize -RTS' to increase it.
desire:diophantine benl$ grep -B 8 -A 16 "if (Sp - 96 < SpLim)" \
DiophantineVect.dump-cmmz-sp > dump-entry.cmm
}}}
From this I get about 12 blocks of cmm code that look like the one in your
report. I checked the corresponding asm code and didn't see any register
allocation problems. A few of the proc entry blocks assign to `%rbx`, but
the original value this register had on entry to the proc is restored
before issuing `jmp *-8(%r13)`, which I assume invokes the GC.
However, I do notice that some of the calls to `stg_gc_fun` in the cmm
code have `R1` arguments, and some don't.
{{{
c1cr6:
_s12rI::P64 = R6;
_s12rF::I64 = R5;
_s12rU::I64 = R4;
_s12rA::I64 = R3;
_s12rD::I64 = R2;
_s12rZ::P64 = R1;
if (Sp - 96 < SpLim) goto c1crZ; else goto c1cs2;
...
c1crZ:
R1 = _s12rZ::P64;
I64[Sp - 40] = _s12rD::I64;
I64[Sp - 32] = _s12rA::I64;
I64[Sp - 24] = _s12rU::I64;
I64[Sp - 16] = _s12rF::I64;
P64[Sp - 8] = _s12rI::P64;
Sp = Sp - 40;
call (stg_gc_fun)() args: 48, res: 0, upd: 8; *** no R1
argument here
}}}
But then:
{{{
offset
c1eWQ:
_s17H9::P64 = R1;
if (Sp - 96 < SpLim) goto c1eXm; else goto c1eXl;
...
c1eXm:
R1 = _s17H9::P64;
call (stg_gc_fun)(R1) args: 8, res: 0, upd: 8; *** got an R1
here
}}}
If `R1` needs to valid at *every* call to stg_gc_fun, then you need to
pass it as an argument or the register liveness determinator will mark it
as dead -- and no good will come from that.
{{{
c1crZ:
movq %vI_s12rZ,%rbx
# born: %r1
# r_dying: %vI_s12rZ
# w_dying: %r1 **** R1 dies here
movq %vI_s12rD,-40(%rbp)
# r_dying: %vI_s12rD
movq %vI_s12rA,-32(%rbp)
# r_dying: %vI_s12rA
movq %vI_s12rU,-24(%rbp)
# r_dying: %vI_s12rU
movq %vI_s12rF,-16(%rbp)
# r_dying: %vI_s12rF
movq %vI_s12rI,-8(%rbp)
# r_dying: %vI_s12rI
addq $-40,%rbp
jmp *-8(%r13)
}}}
If the `stg_gc_fun()` thing is correct then can you tell me how to find
the assembly sequence in your initial report? I can hack on it this week.
--
Ticket URL: <http://hackage.haskell.org/trac/ghc/ticket/7192#comment:7>
GHC <http://www.haskell.org/ghc/>
The Glasgow Haskell Compiler
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