Just in case anyone was wondering why you might want GHC to work well on MIPS...
http://www.movidis.com/products/rev_spec.asp A 16x core 600Mhz low-power MIPS machine pre-installed with Debian. With the new smp-capable ghc, such a box might be rather good for some Haskell server application. It's a similar price to Sun's 4x core (with 4 threads per core) 1Ghz low power sparc machines (which run Linux or Solaris). On Mon, 2006-08-21 at 15:18 +0100, Thiemo Seufer wrote: > Hello All, > > I currently try to get a ghc port on mips-linux going. I understand > Igloo does the same ATM, and things look promising so far. > > However, the port is currently unregisterised, and I would like to > improve it a bit. A registerised port seems to be achievable with > a moderate amount of work. I looked a bit around in the code, and > have now a few questions: > > - The example of other ports suggests the useful maximum of general > purpose registers for GHC is 8. I also presume that unmentioned > registers aren't touched by haskell code. Is this correct? > > - The comments in the source suggest that callee-saved registers are > preferable, without further explanation. I would expect a mix of > caller- and callee-saved registers to be potentially better. Any > advice on this? > > - The mips ABI defines 8 (or 9 when including the frame pointer) > registers as callee-saved, and more than 9 caller-saved temporaries. > With four registers taken for stack/heap pointers this leaves a > 5/3 split of callee-saved/caller-saved registers, if all my > assumptions above are ok. Are there other considerations to take > into account for the register layout? > > > Thiemo > _______________________________________________ > Glasgow-haskell-users mailing list > Glasgow-haskell-users@haskell.org > http://www.haskell.org/mailman/listinfo/glasgow-haskell-users _______________________________________________ Glasgow-haskell-users mailing list Glasgow-haskell-users@haskell.org http://www.haskell.org/mailman/listinfo/glasgow-haskell-users