On Saturday 24 May 2003 14:20, Magnus Danielson wrote: > When I draw a schematic as part of a reverse-engineering project I > discovered an annoying detail, the MSB/radix order differ between symbols. > This effectively forces me to draw confusing bit-reordering maps instead of > a straight bus (which is logical from the naming convention of the signal > names of each component and indeed how it was actually designed - which is > just a logical consequence).
Cadence composer has an interesting symbol called "patch". It has ha left side and a right side and a property that maps the left side to the right side. In your case, you would insert one patch element into your bus and set the property to "[0:7]=[7:0]". Such a patch element could be used for fancy line crossing without needing to route loads of signals: "7,6,5,4,3,2,1,0=2,1,3,4,6,5,7,0" or whatever. Just an idea as this kind of patching is quicker than changing and loading new symbols. (And you get reminded that there is something to take special care about in your design.) Svenn
