25.03.2017 10:22, Vladimir 'phcoder' Serbinenko пишет:
> On Sat, Mar 25, 2017, 00:16 Andrei Borzenkov <arvidj...@gmail.com> wrote:
> 
>> 24.03.2017 21:38, Gailu Singh пишет:
>>> This is how it is calculated in coreboot
>>>
>>>
>> https://review.coreboot.org:4430/cgit/coreboot.git/tree/src/lib/cbfs.c?id=refs/heads/master#n268
>>>
>>> ___FMAP__COREBOOT_BASE and ___FMAP__COREBOOT_SIZE are based on values
>>> available in fmd files (depending on 8MB/16Mb coreboot).
>>>
>>>
>>> #grep -r FMAP__COREBOOT_BASE src/lib/cbfs.c: size_t fmap_top =
>>> ___FMAP__COREBOOT_BASE + ___FMAP__COREBOOT_SIZE;
>>> build/fmap_config.h:#define ___FMAP__COREBOOT_BASE 0x300800
>>>
>>> #grep -r FMAP__COREBOOT_SIZE
>>> src/soc/intel/baytrail/romstage/cache_as_ram.inc:#define CODE_CACHE_SIZE
>>>  _ALIGN_UP_POW2(___FMAP__COREBOOT_SIZE)
>>> src/lib/cbfs.c: size_t fmap_top = ___FMAP__COREBOOT_BASE +
>>> ___FMAP__COREBOOT_SIZE;
>>> build/fmap_config.h:#define ___FMAP__COREBOOT_SIZE 0xc1d800
>>>
>>> #cat src/mainboard/intel/leafhill/leafhill.16384.fmd
>>> FLASH 16M {
>>> SI_DESC@0x0 0x1000
>>> IFWI@0x1000 0x2ff000
>>> FMAP@0x300000 0x800
>>> COREBOOT(CBFS)@0x300800 0xc1d800
>>> UNIFIED_MRC_CACHE@0xf1e000 0x21000 {
>>> RECOVERY_MRC_CACHE@0x0 0x10000
>>> RW_MRC_CACHE@0x10000 0x10000
>>> RW_VAR_MRC_CACHE@0x20000 0x1000
>>> }
>>> BIOS_UNUSABLE@0xf3f000 0x40000
>>> DEVICE_EXTENSION@0xf7f000 0x7f000
>>> UNUSED_HOLE@0xfff000 0x1000
>>> }
>>>
>>>
>>
>> How does it help us? We have no idea which board grub currently runs on.
>> Do you suggest scanning the whole memory for "__FMAP__" signature?
>>
> I think it ends up at constant offset from the end of ROM
> 

But we do not know the end of ROM in general case, that is the problem.

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