[EMAIL PROTECTED] (Ludovic Court�s) writes:
>
> The generic
> version of `FETCH_STORE' relies on `scm_mutex_lock ()' and
> `scm_mutex_unlock ()' which are not (yet) implemented.
Actually, they were implemented but then disappeared. Recent breakage
:-).
> + Note: look
> + at the `always_swap ()' function is Glibc's `atomicity.h' in the `sysdeps'
> + directory. */
Looks like that's changed in the latest and greatest glibc, now
bits/atomic.h and __arch_atomic_whatever().
> +#if defined (__GNUC__) && defined (__powerpc__) && SIZEOF_SCM_T_BITS == 4
> +
> +/* On 32-bit PowerPC arches, we use the `lwarx' ("load word and reserve,
> + indexed") and `stwcx.' ("store word conditional, indexed") instructions.
No need to describe instructions. (But crib notes on the reservation
mechanism for single or multi cpus is fine.)
> + asm ("\n1:\n" \
I think "1:" is a gas-ism, it might not work on aix and macos. But
dunno if guile actually runs at all on those systems at the moment.
> + : "=&r" (fet) \
> + : "r" (mem), "r" (sto)); \
I think "mem" should be in the outputs too, since it's changed.
_______________________________________________
Guile-user mailing list
[email protected]
http://lists.gnu.org/mailman/listinfo/guile-user
