in that case, get a Vivado licence. http://www.xilinx.com/products/design-tools/vivado/integration/esl-design/
It takes C code and will turn it into FPGA code and will let you fiddle around with stuff like how many pipelines how many clocks between data-in-enable and data-out-valid and so on. On Tue, July 1, 2014 2:04 pm, Kurt L Keville wrote: > Well, like Federico says, if you have to do it, you might as well go all > in. We have been talking to some Verilog coders about running LINPACK on > FPGA to game the Student Cluster Competition... > > > -snip- > > > trying to picture someone writing hardware code to do googling. makes my > head spin... > > -- _______________________________________________ Hardwarehacking mailing list [email protected] http://lists.blu.org/mailman/listinfo/hardwarehacking
