> BTW, why doesn't the generic gpio watching mechanism work for > the imx?
I'm not sure if I understand you. "addlist GPIOS xxx" works. But it just shows when a signal level has changed. "dump gpio" does way more, it also (partially) decodes the state. If you're more familiar with PXA255, then think about the GAFR (GPIO Alternate Function Registers). They define if a processor pin is a GPIO or a processor function pin. And if the latter, which one. The "dump gpio" does something similar for the i.MX21. > That would help for doing gpio watching while in wirq, for > example. That works. For example, let's watch the 32 pins of the PAxx function block by looking at the SSR (Sample State Register): HaRET(2)# clear gpios HaRET(3)# addlist gpios p2v(0x10015024) HaRET(4)# watch gpios 1 Beginning memory tracing. Watching GPIOS(00): Addr b8015024(@10015024) 000.000 GPIOS PTA_SSR=a5c30c00: GPIO10=1 GPIO11=1 GPIO16=1 GPIO17=1 GPIO22=1 GPIO23=1 GPIO24=1 GPIO26=1 GPIO29=1 GPIO31=1 000.000 GPIOS PTA_SSR: GPIO5(5)=1 GPIO24(24)=0 000.002 GPIOS PTA_SSR: GPIO25(25)=1 GPIO26(26)=0 000.005 GPIOS PTA_SSR: GPIO24(24)=1 000.007 GPIOS PTA_SSR: GPIO5(5)=0 000.008 GPIOS PTA_SSR: GPIO24(24)=0 000.010 GPIOS PTA_SSR: GPIO5(5)=1 GPIO31(31)=0 000.011 GPIOS PTA_SSR: GPIO5(5)=0 GPIO7(7)=1 GPIO8(8)=1 GPIO9 (9)=1 GPIO12(12)=1 GPIO13(13)=1 GPIO14(14)=1 GPIO15(15)=1 GPIO19 (19)=1 GPIO20(20)=1 GPIO21(21)=1 GPIO31(31)=1 000.013 GPIOS PTA_SSR: GPIO5(5)=1 GPIO7(7)=0 GPIO8(8)=0 GPIO9 (9)=0 GPIO12(12)=0 GPIO13(13)=0 GPIO14(14)=0 GPIO15(15)=0 GPIO19 (19)=0 GPIO20(20)=0 GPIO21(21)=0 GPIO24(24)=1 GPIO27(27)=1 000.014 GPIOS PTA_SSR: GPIO5(5)=0 GPIO10(10)=0 GPIO16(16)=0 GPIO22(22)=0 GPIO25(25)=0 GPIO26(26)=1 GPIO27(27)=0 000.015 GPIOS PTA_SSR: GPIO10(10)=1 GPIO16(16)=1 GPIO22(22)=1 GPIO24(24)=0 GPIO25(25)=1 GPIO26(26)=0 000.016 GPIOS PTA_SSR: GPIO5(5)=1 GPIO24(24)=1 000.017 GPIOS PTA_SSR: GPIO5(5)=0 GPIO10(10)=0 GPIO11(11)=0 GPIO16(16)=0 GPIO17(17)=0 GPIO22(22)=0 GPIO23(23)=0 GPIO24(24)=0 GPIO25(25)=0 GPIO26(26)=1 GPIO31(31)=0 000.019 GPIOS PTA_SSR: GPIO10(10)=1 GPIO11(11)=1 GPIO16(16)=1 GPIO17(17)=1 GPIO22(22)=1 GPIO23(23)=1 GPIO25(25)=1 GPIO26(26)=0 GPIO31(31)=1 So, now I know which GPIOs or pin functions do toggle. But to find out what pin 10 might be, a "dump gpio" is nicer. I'd look at "PA10" and see: : Pin Function GIUS GPR DDIR OCR A_OUT DR SSR ICR Int PUEN : PA10 primary mux prim in A_IN one 0 1 rise dis 1 So this pin uses the primary CPU function, which is not a free programmable GPIO, but the input signal NFIO3. It could also be an output pin PC_WP (towards the PCMCIA adapter), but this is clearly not the case. That kind of information is something that is not easily accessible with the gpio watching mechanism, but is quite helpful for reverse-engeneering. _______________________________________________ Haret mailing list [email protected] https://handhelds.org/mailman/listinfo/haret
