Hi all, As I wrote in the previous HLADPSA announcement, during the following moths I'm going to write a translator from Haskell to VHDL in order to accomplish my masters thesis goal.
The main requirement is managing to translate from a ForSyDe (http://www.imit.kth.se/info/FOFU/ForSyDe/ ) specification which is Haskell after all, to VHDL. In order to get part of the work for free I decided to design the translator as a compiler backend. The best option so far seems to be Yhc's Core API (http://haskell.org/haskellwiki/Yhc/API/Core ), which unfortunately lacks type information. I discarded GHC due to the current "bit-rotted" state of External Core (http://www.haskell.org/pipermail/haskell-cafe/2006-October/018786.html ) and higher complexity of its core representation (SystemFC). I might have overlooked other approaches and/or intermediate representations such as GHC's C-- and STG (is it still used?). I'd be pleased to hear any suggestions. Thanks in advance, Alfonso Acosta _______________________________________________ Haskell-Cafe mailing list Haskell-Cafe@haskell.org http://www.haskell.org/mailman/listinfo/haskell-cafe