Re: [h-e-w] Location of error lines from modelsim vhdl compile do not work

[Stephen Leake]

Lennart Borgman <lennart.borg...@gmail.com> writes:

> But vhdl-mode is part of Emacs so I guess compiling vhdl files should
> be supported by Emacs as well. 

The error messages from vhdl follow the gnu standard error format, while
those from modelsim do not.

Here is what I use for modelsim on windows (it works on Linux as well):

        ;;; ModelSim
        ;; ** Error: ../iru_timer.vhd(118): Case statement covers only 8 out of 
729 cases.
        ;; ** Warning: [1] ../main_clock_entity.vhdl(115): No default binding 
for component 'sync_deglitch_component'.
        ;; ** Warning: ../main_clock_entity.vhdl(115): No default binding for 
component 'sync_deglitch_component'.
        ("^\\*\\* Error: \\(.+\\)(\\([0-9]+\\)):" 1 2 nil)
        ("^\\*\\* Warning: \\(\\[[0-9]+] \\)?\\(.+\\)(\\([0-9]+\\)):" 2 3 nil)

Note that the paths in the example messages in the comments are
relative; that avoids problems with Windows drive letters. That's a
feature of the makefile, not Emacs or Modelsim.

-- 
-- Stephe