It appears that there is a bug in gnumake that arises when
a variable is redefined. For example, if I define "EXE = .a"
in my main makefile, then specify a build rule for a target
"myproject$(EXE)", then include a second makefile that redefines
"EXE = .out" and makes some other build rules for other targets,
then the first build rule seems to get confused. If I put "echo $(EXE)"
I see the right value (".a"), but the target acts as if the second
value (".exe") is present and the file does not recognize the command
line target "myproject.a".
Is this a bug? Is this a known bug?
--
Randy Yates
Sony Ericsson Mobile Communications
Research Triangle Park, NC, USA
[EMAIL PROTECTED], 919-472-1124
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