I want a Makefile that will on invocation by
make Types=a,b,c Foo=x foo
'recursively' call
make Type=a Foo=x foo
make Type=b Foo=x foo
make Type=c Foo=x foo
So far I have:
--------------------------------------------------------------------
ifneq ($(Types),)
Komma:=,
MakeFlags:=$(subst Types=$(Types),,$(MAKEFLAGS))
MAKEOVERRIDES:=
MakeFlags:=Foo=$(Foo)
.PHONY: all
all: $(foreach i,$(subst $(Komma), ,$(Types)),sub.$(i))
@:
%: all
@:
sub.%:
@#echo "Flags: $(MakeFlags)"
@echo "MAKEFLAGS: $(MAKEFLAGS)"
@echo "Types: $(Types)"
@echo "Type: $*"
make MAKEFLAGS= Foo=$(Foo) Type=$* $(MAKECMDGOALS)
else
.PHONY: foo
foo:
@echo "foo: Type: $(Type), Foo: $(Foo)" ####
endif
--------------------------------------------------------------------
That seems to create the make calls properly, however I don't get
the line marked by #### executed.
What am I doing wrong?
Andre'
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