I'm incorporating bits from various shell scripts into a central Makefile
for a largish project. I've never written a Makefile more complex than
foo: bar.h
before and I'd like to learn how to do this the "right" way; that is, more
experienced users won't laugh at my clearly "un-make-ish" habits.
Right now, a common task is to make sure that all files in our Subversion
repository have the correct properties set. I do that from a shell
script like so:
find $(CURDIR) -name '*.py' \
-execdir svn propset -q svn:keywords 'Id LastChangedDate
LastChangedRevision' {} \; \
-execdir svn propset -q svn:executable '*' {} \;
\
-execdir svn propset -q svn:eol-style native {} \;
Is it idiomatic to do this by putting that in a target like so:
svnprops:
find $(CURDIR) -name '*.py' \
-execdir svn ....
or is there a more "native" way I could approach this?
Also, I'd really like to refactor all those identical calls into a
variable that contains something like "svn propset -q", but I'm not sure
how to get Make to split such a string into the command and its arguments
instead of a command named exactly that. For example, this snippet:
foo: TESTVAR = "echo this is a test"
foo:
$(TESTVAR)
tries to run a command called "echo this is a test":
$ make
"echo this is a test"
/bin/sh: echo this is a test: not found
make: *** [foo] Error 127
which happens not to exist on my system. Is this the wrong approach or
am I missing something?
--
Kirk Strauser
