Hi list, I have a convergence error im my simulation. Basically, I have to work with switchmode circuits. I am trying to build a simple sawtooth generator using a current source, a capacitor and a voltage controled switch, with a non-zero RON.
The circuit is like the following: * circ-3 * Spice netlister for gnetlist SW1 1 0 1 0 SWITCH1 C1 1 0 1n I1 0 1 100u .model npn npn .MODEL SWITCH1 SW VT=2.5 VH=2.475 RON=1 ROFF=10MEG .print tran V(C1) .tran 0 200e-6 500e-9 UIC >circ-3.dat .END The error, after "gnucap -b circ-3.cir": Gnucap 2005.06.10 RCS 25.28 The Gnu Circuit Analysis Package Never trust any version less than 1.0 Copyright 1982-2002, Albert Davis Gnucap comes with ABSOLUTELY NO WARRANTY This is free software, and you are welcome to redistribute it under certain conditions according to the GNU General Public License. See the file "COPYING" for details. * circ-3 very backward time step convergence failure (itl4) newtime=4.987417e-05 rejectedtime=4.987417e-05 oldtime=4.987417e-05 using=4.987417e-05 zero time step newtime=4.987417e-05 rejectedtime=4.987417e-05 oldtime=4.987417e-05 internal error: step control (adt=1e-12,rdt=-5.36442e-13) time0=4.98742e-05 time1=4.98742e-05 rtime=4.98742e-05 Maybe because I am not using the lastest GNUCAP... or is there an option to control the integration step, or to solve this problem? I look for it in the GNUCAP manual with no success. Regards JRM _______________________________________________ Help-gnucap mailing list [email protected] http://lists.gnu.org/mailman/listinfo/help-gnucap
