Kalle Olavi Niemitalo wrote:
> 
(...Very useful thing about the HW clock, maybe problem=fixed ...)
However, Atle is konfused. No wonder, I haven't even installed the Hurd yet, how can I 
hope to be of use before I at least get the
system running?
Well ... I have been writing with Kalle about this (and lots of other stuff, we are 
having great fun, Hurd is a good way to make new
friends!)
and he has given you the program below:
> #include <mach/machine/pio.h>   /* outb (port, value) */
> #include <stdio.h>
> int
> main (void)
> {
>   unsigned char old;
>   outb (0x70, 0x0A); /* select RTC register A */
>   old = inb (0x71);  /* read its value */
>   printf ("Register A was: 0x%02X\n", old);
> 
>   outb (0x70, 0x0A); /* select RTC register A */
>   outb (0x71, 0x20); /* write 0x20 to it, selecting the 32kHz clock */
> 
>   return 0;
> }
Heed his warning about the race condition! Potential ARRRHG may result if not!
My konfution is with the ways to access the RTC - And now the fixed disk parameters 
are here, too. I am looking through the IBM
Technical Reference... trying to make sense of it. We still have the BIOS, right? When 
Hurd starts, it doesn't do away with the BIOS
before protected mode is up (should I say Mach here?)
and when that happens, hopefully the hardware is set up, or maybe not??
Kalle found what had NOT been done, but shouldn't a default stay there in absence of 
an 'override'?
What is 'not done' is left the way the BIOS set it up, right? Oder etwa nicht?
Now, what Kalle has given you, is the key to the CMOS, but there is more. While 
waiting for me to read through the BIOS, look at
this:
(Comments are my own, to not infringe on copyrites)

#include <linux/sysdeps/io/weirdness/haltandcatchfire.h>
main()
{
        shotime();      /* Oh yeah */
        /* Kikk klokks bott */
        outb(0x43, 0x34); /* The fact that 0x34=00110100B has some */
                        /* significance (control word, I'll see if I can find it) */
        outb(0x40, 0x00); /* The 00 part of 0x2000 */
        outb(0x40, 0x20); /* The 20 part of 0x2000 - what it means? I'll see if .. */
        shotime();

        /* Klikk klokk bakk to normal */
        outb(0x34, 0x34); /* Starting to look like a 'Set RTC' instruction? */
                                /* see over .. */
        outb(0x40, 0x00); /* the lower part of 0000 */
        outb(0x40, 0x00); /* The upper part of 0000 */
        shotime();
        exit(0);
}

/* Find a way to print time until a key is pressed. This is stolen from a DOS program, 
so please ... */
shotime()
{
        time_t t;

        while ( ! keypressed()) {
                t = localtime(0);
                printf("\r%u", t);
        }
}

Now, Kalle's program lets you fix the information about the clock, this has to be done 
first, in my view. If the CMOS data are
wrong, there is no way to get a sensible time out of the machine. But, as you see, 
even though the BIOS is probably handling this at
this point, assuming we are just starting, some gremlin can go an play with the clock 
anyway. But, there is more ... wee will bee
beck wiz moah on zaht in dzeh nekzt episod, HAHAHA ...
---------
Nekzt Epizod
Reading on in a different Manual, I find that wat I believed to be the 'Set Klokk 
Kommand' is not even necessary. Seems like the
program will work even if you delete the outb(0x43, 0x34) instructions ... I am 
tempted to rearrange this mail and fix it, but I
hope you will be amused as to the way I proceed.
What we have been playing with is a 8253/8254 PIT - TLA for Programmable Interval 
Timer.
I wonder what they did to the Motorola chip? Are they compatible? Is the 8253 part of 
a 'chipset' now? Konfused, is what I am ...
The PIT has 'modes' of operation, we have been operating it in mode 2, which in light 
of new information, was not necessary - seem
it was included for educational purposes. This must be significant: 
The PIT has three counters. Counter 0 is connected to IR0 in the PIC, to IRQ0. DOS 
uses this to update the clock.
This one operates _in_mode_2. I hope to find out what these 'modes' are ...
Ah: Is this right? "Mode 2 is a 'Rate Generator' with periodic binary counting"
What, then, is mode 3? And mode 1? Is there a mode 0?

I wonder:Does the kernel use this for task switching?

I ask this because this seem like a hardwired mode of operation that will always stay 
the same. It will give 18.206 pulses/s, which
seems reasonable for task switching (what on earth do I base that on??)
 It is also edge-triggered, something I also would find reassuring, at least while 
developing the kernel :-)

This whole thing will generate INT 0x08 periodically - is this still valid when Hurd 
runs (probably not?)

Reformed DOS-prgrammers (like myself) will appreciate that this is where the 0x1C 
interrupt comes from - so THIS is why we didn't
have to do the EOI :-)
Int 0x1c is done from the int08 handler. Sorry to bore you with such DOSsy things ...

Now, to another place where things are stored, Kalle asked me if the registers were 
'readable', I havent found that out yet, I need
to go to the GOLL (Great Off-Line Libray in the bedroom, on top of a cupboard) for 
that. But look:

SEG:OFF Size    Wisdom
 40:6C   16     Low word of timer count
 40:6E   16     High word timer count
 40:70    8     Timer overflow flag, crossed 24hr boundary.

Timer count is the number of timer pulses since 00:00 AM

Hope I didn't kreate konfution, my intention was to eliminate some of it.
While writing this, I got less confused, and I feel I have some more knowledge about 
the clock than what I had before.

Thank you for bearing with me.

Atle


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