All, I am trying to write some fairly complicated make scripts.
Here is a problem I am wrestling with. Suppose I have an unknown file "something.v" which is a concatenation of several "little.v" files. In one step of my makefile, I want to use something.v as the prerequesit and run a perl script which breaks up something.v into several little.v files. Then I want us specify the little.v files as prerequisites to another step. I can't seem to figure out how to make a variable which contains all the little.v filenames which I can use as a prerequisite to the next step. The problem is that all variables get expanded up front. At that time the little.v files don't exist so the expanded value used as a prerequisite is nothing. How do tell make to expand a particular variable when I get to it and not up front? Thanks, Ken _______________________________________________ Help-make mailing list [EMAIL PROTECTED] http://mail.gnu.org/mailman/listinfo/help-make
