I'm trying to get some particular information out of a Makefile. 1. Given a target file, is there a rule to remake it? 2. Given a target file, is it a dependency of anything, or not?
There seems to be no easy way to do this. The best way I've found involves running 'make target -n' and grepping the output for particular strings, but this is both slow and fragile. What I really want is an option a la 'make --info target' which would return a useful exit status reflecting such information, or a message which is guaranteed not to change over versions. The reason I can't just grep through the Makefile is that I'd have to replicate Make's entire macro/variable facility, which seems highly undesirable. Is there such an option? If not, I would expect it would not be too hard to add, but I don't understand the internal C code of gnu make quite well enough to do it myself. Ideally, I'd also like to be able to extract a list of all 'leaf' nodes in the dependency tree, and a list of all direct dependencies of a given target, but those might be harder. Perhaps the simplest scheme from my point of view would be an option --print-dependencies, similar to -n, which prints out the direct dependencies of the specified target (rather than checking to see if they're up to date); nothing if there's no such target. I could leverage this to generate everything I want. Please reply to me if you have any thoughts, since I'm not subscribed. --Nathanael Nerode _______________________________________________ Help-make mailing list [EMAIL PROTECTED] http://mail.gnu.org/mailman/listinfo/help-make
