Hello Paul and Jens,
Great. The problem is solved.
now my make file looks like the follwing:
$(shell cvs co my_test 1>&2)
include makefileUnderMy_TestDirectory
my_test:
@echo $(VarialeInTheIncludedMakefile)
Best regards,
Yanghui Bian
-----Original Message-----
From: Paul D. Smith [mailto:[EMAIL PROTECTED]]
Sent: Tuesday, January 28, 2003 13:35
To: Jens Schweikhardt
Cc: Yanghui Bian; [EMAIL PROTECTED]
Subject: Re: Have make run shell comand but not in a target
%% Jens Schweikhardt <[EMAIL PROTECTED]> writes:
js> On Mon, Jan 27, 2003 at 10:23:02AM +0100, Yanghui Bian wrote:
js> # Hello,
js> # In my make file, I need to include the sub makefile which
js> # is in CVS system. I write it as fllows:
js> # $(shell cvs co my_test)
js> # include ./my_test/Makefile
js> #
js> # It works fine. But I want make to echo the command "cvs co my_test"
js> # result as I run in shell.
js> I'm not sure I understand what you want, exactly. Maybe this (untested):
js> $(shell echo "cvs co my_test"; cvs co my_test)
This won't work, because $(shell ...) is like ``.
You need something like:
$(shell echo "cvs co my_test" 1>&2; cvs co my_test)
to send the message to stderr instead of stdout.
--
-------------------------------------------------------------------------------
Paul D. Smith <[EMAIL PROTECTED]> Find some GNU make tips at:
http://www.gnu.org http://make.paulandlesley.org
"Please remain calm...I may be mad, but I am a professional." --Mad Scientist
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