Is there a way to append to variables defined in a Makefile from the command line?

I have tried calling make (3.80) like this:
make 'DEFS+=-I/usr/local/include'

but this does not work, the command line variable definition
overrides the Makefile variable.

The reason I would like to do this from the command line is because I want to have 
make pass the modified variable to all sub-makes
without having to modify any make files.

Thanks, Bob


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