So I have this Makefile, in a given directory, A. In it, I define a variable SRC that includes all the source files, which happen to be strung out in several other directories, something like:
root
A
Makefile
B
B1
*.c
B2
*.c
C
*.hI'm trying to add header file dependency knowledge to this Makefile. I've used mkdep to generate a .depend file, and I'm including it in the Makefile. a typical line in it looks like:
QdBufferedIO.o: ../src/core/QdBufferedIO.c ../inc/QdPlatform.h
The problem is, the target "QdBufferedIO.o" does not include any path information. Since there is not ./QdBufferedIO.o relative to the location of the Makefile, it doesn't do anything. If I include the path information, like
../src/core/QdBufferedIO.o: ../src/core/QdBufferedIO.c ../inc/QdPlatform.h
make then does the right thing. There doesn't seem to be a way to get mkdep to include the path information for each target, so I figure there must be way to get make to look in various paths for each target. I see in the GNU Make Manual there is a VPATH variable, but I gather it only applies to prerequisites, not to targets. Is there anything analogous for targets?
Thanks! randy
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