Dear listers, I would like to know if it is possible to store the result of a shell command into a make variable (locally in a rule), or, let's say, is it a way to use the result of a shell command more than once. Keeping the result of the command in a shell variable wouldn't help much, since I'd like to be able to perform text operations make makes easy, such as substitution.
Since all that can sound quite abstract, here is my problem. I use a tool called coqdep to calculate dependencies between source files. I then want : 1. To write these dependencies to an auxiliary Makefile 2. To write them in another file, in a slightly different way, this other file being used to generate documentation. And, of course, I don't want to call coqdep twice, since parsing a source file is long. So, if somebody has some idea, it'd be appreciated. Thanks a lot, S�bastien. _______________________________________________ Help-make mailing list [EMAIL PROTECTED] http://mail.gnu.org/mailman/listinfo/help-make
