Hi, When I type make clean, make rebuilds the dependency files before executing the commands in the clean target. I follow the methodology described at the paulandlesley site.
the makefile structure is: OBJS=... <pattern-rules> all: $(OBJS) clean: (the clean target and its commands) -include $(OBJS:.o=.d) How can I avoid rebuilding all the dependencies when I only want to 'make clean'? Thanks, Martin _______________________________________________ Help-make mailing list [EMAIL PROTECTED] http://mail.gnu.org/mailman/listinfo/help-make
