Hi All, and Paul,
I've hit a little snag that baffles me and I wonder how to work around it.
I have a makefile that gets make variables declared in another makefile by
using $(shell egrep [...]) and that's not something I can change.
The string that is found is assumed by this makefile (call it "rules", bec.
that's its name) to be a simple string, i.e. something like "foo-4.6.2". But in
one case I want to use, in the second makefile, an assignment for a macro
variable that contains in itself a make function call:
MACRO =-$(shell /bin/date '+%Y%m%d')-1
In "rules", the $(MACRO) isn't being "evaluated". I get a strange error message
though:
/bin/sh: shell: command not found
I have a feeling this error message doesn't indicate at all what's really going
on and should be ignored. But in any case, is there a way to "force" make to
really "evaluate" a valid make string like contained in $(MACRO), so that the
subshell is invoked and the command run (and its output placed in $(MACRO) like
I expected)?
TTTT, I think I am using make-3.80 but am not sure (because an application is
calling make for me, and it may be fully-qualifying the path to make, in which
case it is calling make-3.79). Thanks in advance.
Soren Andersen
--
Sooooo, tell me, my little one-eyed one: on what poor, pitiful, defenseless
planet has my MONSTROSITY been ... unleashed?
-- "Dr. Jumba" (Disney's "Lilo and Stitch")
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