David Wuertele wrote: > I have set up a system where my developers can make simple makefiles > like this: > > PROGRAMS = myprogram > myprogram_OBJ = one.o two.o three.o > > PROGRAMS += herprogram > herprogram_OBJ = two.o three.o four.o > > include ../../davesrules.mk > > And davesrules.mk creates and includes a .mk that has all the actual > dependencies between programs and objects. There are actually a lot > of other requirements that I'd rather not go into that make the > obvious "myprogram: one.o two.o three.o" statement unusable in my > situation.
What about the possibly-not-so-obvious use of $(foreach) and $(eval)? Noel -- NOTICE: If received in error, please destroy and notify sender. Sender does not waive confidentiality or privilege, and use is prohibited. _______________________________________________ Help-make mailing list [EMAIL PROTECTED] http://mail.gnu.org/mailman/listinfo/help-make
