Hi, I can't understand the following behaviour:
cat Makefile
#-----------------------------------------------------------------------------------
list_flag = $(subst =flag,,$(filter %=flag,$(MAKEFLAGS)))
#
.PHONY: default info
#
default: info b
#
info:
@echo 'MAKEFLAGS=|$(MAKEFLAGS)|'
@echo 'list_flag=|$(list_flag)|'
@echo 'origin MAKEFLAGS=$(origin MAKEFLAGS)'
#
define testFunc
$(1):
@echo '----------------- rule testFunc'
@echo 'target=$$@'
endef
#
$(foreach el,$(list_flag),$(eval $(call testFunc,$(el))))
#-----------------------------------------------------------------------------------make d=flag c=tmp b=flag a=tmp
MAKEFLAGS=|a=tmp b=flag c=tmp d=flag| list_flag=|b d| origin MAKEFLAGS=file make: *** No rule to make target `b', needed by `default'. Stop.
if however I add 'MAKEFLAGS = d=flag c=tmp b=flag a=tmp' in the Makefile
make d=flag c=tmp b=flag a=tmp
MAKEFLAGS=|a=tmp b=flag c=tmp d=flag| list_flag=|b d| origin MAKEFLAGS=file ----------------- rule testFunc target=b
and with 'MAKEFLAGS = a=tmp b=tmp c=tmp d=tmp'
make d=flag c=tmp b=flag a=tmp
MAKEFLAGS=|a=tmp b=flag c=tmp d=flag| list_flag=|b d| origin MAKEFLAGS=file make: *** No rule to make target `b', needed by `default'. Stop.
I'am running GNU Make 3.80 with patch 'eval-crash.diff' on Linux 2.4.21-4.EL.
Thanks for any help Regards, Sebastiano
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