I've have a makefile like so:
%.o: %.cxx
$(CXX) $(CXXFLAGS) $(MYINCLUDES) $*.cxx -c -o $@
%: %.o
$(CXX) $(CXXFLAGS) $^ $(PQLIB)/libpqxx.a $(MYLIBS) -o $@
The values of the variables aren't so important. I use this makefile
like so:
make test004
...which expands to:
521$ make test004
/usr/bin/g++ -Wall -O2 -I/local/apps/postgresql/include -I/local/apps/libpqxx/include
test004.cxx -c -o test004.o
/usr/bin/g++ -Wall -O2 test004.o /local/apps/libpqxx/lib/libpqxx.a
-L/local/apps/postgresql/lib -lpq -o test004
rm test004.o
My question is, where does the 'rm' command come from? If I make the
object file by itself, it stays put; and if I subsequently make my
executable target, a pre-existing .o file stays put. But if my object
file rule is called by my executable target rule, an 'rm' is added.
So, where did this 'rm' come from, and can I stop this behaviour?
522$ make --version
GNU Make 3.80
TIA
--
Ron Peterson -o)
87 Taylor Street /\\
Granby, MA 01033 _\_v
https://www.yellowbank.com/ ----
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