On Fri, Sep 03, 2004 at 06:11:27PM -0400, Noel Yap wrote: > My current implementation is way too complicated. The gist is something > like: > > include-makefile = $(foreach \ > m, \ > $(1), \ > $(eval $(call _include-makefile,include,$(m),$(__FILE__)))) > > define _include-makefile > __FILE__ := $(2) > $(1) $(2)
Doesn't that need to be export __FILE__ := $(2) ? > __FILE__ := $(3) > endef > > Then, rather than: > > include lib/makefile > > you do: > > $(call include-makefile,lib/makefile) > > and within lib/makefile, you could do: > > $(call include-makefile,$(dir $(__FILE__))another_makefile) > > HTH, > Noel It does. Thank you. > > Ross Boylan wrote: > > >On Fri, Sep 03, 2004 at 05:55:47PM -0400, Noel Yap wrote: > > > >>I created and use an include-makefile function that defines __FILE__ to > >>be the included makefile. $(dir $(__FILE__)) is then the directory in > >>which the included makefile resides. > >> > >>Noel > > > > > >That sounds pretty good. Would you care to share it? > > > >I can't see how to get the name of the included file.... oh, are you > >saying you do this in the top level Makefile? Can it cope with > >include files being found via the -I command line argument? > > > > > >>Ross Boylan wrote: > >> > >> > >>>I would like my snippets of makefiles able to find out the directory > >>>in which they reside, even if they are included from another > >>>directory. As far as I can tell, this facility is not directly > >>>available. I'd appreciate any suggestions about the best way to > >>>proceed. > >>> > >>>Here's a simplified version of my setup > >>>/src > >>>/src/test > >>>/src/debugtest > >>>/src/libtest > >>> > >>>/src has my main code, and test/ has test code and data files for the > >>>tests. > >>> > >>>debugtest/ and libtest/ are two different places I will build and run > >>>the source and test code. > >>> > >>>In either src/ or src/test I want to put a little snippet that, > >>>depending on options, creates a variable holding arguments to pass to > >>>the test program. The options control how many arguments there are. > >>>The arguments are paths to the test data files (in src/test/). > >>> > >>>If, for example, the snippet is under test/, it seems natural to say > >>>CMDARGS = $(CURDIR)/data1 $(CURDIR)/data2. > >>> > >>>The problem is that if I include that snippet from another directory, > >>>CURDIR isn't pointing at the right place. > >>> > >>>Here are some ways I've thought of solving this: > >>> > >>>1. Since everything will be driven by a makefile in src/, I could > >>>define TOPDIR := $(CURDIR) their and export TOPDIR, using it in my > >>>other files. > >>> > >>>2. I could (perhaps) rely on the snippets always being invoked from > >>>similar positions in the hierarchy (i.e, one level down), and define > >>>paths like "../test/data1". > >>> > >>>3. I could process CURDIR with some function that knew how to strip > >>>out the lower parts to get something like TOPDIR. > >>> > >>>4. I could do the conditional processing where I make the rules, so > >>>I'd have > >>>test: $(ALLOBJS) data1 > >>>or > >>>test: $(ALLOBJS) data1 data2 > >>>depending on the value. > >>>I would use this with VPATH, and then manipulate $< to get the > >>>prerequisites with paths, and manipulate it to strip out the object > >>>files, passing the rest to the command line. > >>> > >>>1. Looks easiest, 4 hardest (if it could work at all). > >>> > >>>By crude analogy, CURDIR is dynamically scoped, and I'm looking for > >>>something like it that's lexically scoped. > >>> > >>>I am planning to have separate Makefiles in each directory, and invoke > >>>them recursively. > >>> > >>>Or, perhaps, this isn't a good way to structure the directories and > >>>makefiles. I'm open to suggestions. > >>> > >>>Thanks. > >>> > >>> > >>>_______________________________________________ > >>>Help-make mailing list > >>>[EMAIL PROTECTED] > >>>http://lists.gnu.org/mailman/listinfo/help-make > >>> > > > > _______________________________________________ Help-make mailing list [EMAIL PROTECTED] http://lists.gnu.org/mailman/listinfo/help-make
