Hi, i created an example project that i attached to this mail.
The structure of the project is like this:
|-- Makefile
|-- dep
|-- obj
|-- perl
| |-- autodep.pl
| `-- common.pl
`-- src
|-- file
| `-- SRC
| |-- file.c
| `-- stat.c
|-- gui
| `-- SRC
| |-- gui.c
| `-- window.c
`-- net
`-- SRC
|-- net.c
`-- socks.c
When i type "make", the dependencies are generated automatically,
some files that for "file.c" look like:
file.o file.d :
src/file/SRC/file.c
There are no files included from "file.c", so "file.d" looks fine
to me.
1.
In the Makefile i have to write the rule to create the dependency
files BEFORE including them. Why is it like that, i don't understand
that.
2.
When i type "make", the dependency files are generated, THEN the command
to link the ELF file is executed, but the object files are NOT yet made.
Why does this NOT work, i don't understand that, i clearly stated that
for generating the ELF file, the objects need to be there. Is this
related to the automatically created dependencies?
How else do i need to write the rules for the objects and/or the
automatic dependencies?
The behaviour is the same on Windows and on Linux.
Thanks for any hints,
Torsten.
example.tar.gz
Description: application/tgz
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