For my project I would like to generate the list of source files before
starting the compilation. Example:
srcs_file := srcs.txt
srcs = $(shell cat $(srcs_file) 2>/dev/null)
objs = $(srcs:%.c=%.o)
all : $(srcs_file) $(objs)
clean :
rm -f $(srcs_file)
rm -f $(srcs) $(objs)
$(srcs_file) :
for f in foo.c bar.c; do touch $$f; echo $$f >> $@; done
%.o : %.c
touch $@
The problem is, that only the second invocation of 'make' builds the targets
specified in 'objs'. This is probably because during the first invocation the
variable 'objs' has no value.
Is there a way to avoid two invocations of make?
Any help is appreciated. Regards,
Daniel
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