i want to write a short coding standards doc for writing makefiles
for a few people who know even less about makefiles than i do, and one
of the things i'd like to enforce is the use of ${VARNAME} rather than
$(VARNAME) when referring to variables.i just want to clarify that those two uses are exactly equivalent, yes? i prefer the first form since it matches variable usage in the unix shell, while the second resembles command substitution, and i'd rather keep things vaguely consistent. comments? is there a good online doc for "best practises" somewhere? rday _______________________________________________ Help-make mailing list [email protected] http://lists.gnu.org/mailman/listinfo/help-make
