%% Ravi Parimi <[EMAIL PROTECTED]> writes: rp> I have a directory structure like this: rp> /opt/src/main/ ------> build/ rp> ------> tests/
rp> There is one makefile each in the build/ and tests/ directories. I rp> am trying to invoke the make in build/ from the makefile in tests/ rp> by adding a new target in tests/Makefile: rp> main: rp> cd ../build;make PRODUCT=server OBJDIR=obj host rp> The problem with the above is that none of the variables in rp> build/Makefile are getting set when this command is executed. First, you should NEVER use "make" when invoking sub-makes. Always, always use the $(MAKE) variable. If you use plain "make" then none of your flags or command line variables will be passed down to the sub-make. rp> Is there a way to fix this problem? Invoking a sub-make is like invoking a sub-shell: a sub-make is an entirely new process. Only variables that have been exported by the parent make (or specified on the command line, like PRODUCT and OBJDIR above) will be inherited by the child make. If you want EVERYTHING to be exported you can use the "export" command by itself with no arguments. See the GNU make manual. Be aware that this (export) is a GNU make-specific operation and is not portable to other versions of make. There is no portable way to do what you want. -- ------------------------------------------------------------------------------- Paul D. Smith <[EMAIL PROTECTED]> Find some GNU make tips at: http://www.gnu.org http://make.paulandlesley.org "Please remain calm...I may be mad, but I am a professional." --Mad Scientist _______________________________________________ Help-make mailing list [email protected] http://lists.gnu.org/mailman/listinfo/help-make
