Hi,
I'm kind of new to make and i have a question.
This is what i would like to do:
I have alot of makefiles (part of a packagesystem) that i need to parse
and extract relevant information. The variables in these makefiles is
not just plain text but they also contain variables ex "EXAMPLE=
${EXP:S/-/-server-/}" so i need to use make to process the Makefile
whitout building the application(the variables need to be in "text" form
EXAMPLE = rr-123 and not EXAMPLE = ${EXP....} and then parse the
makefile whit my program.
So i need some advice on how to process the makefile and parse it with
my program.
An ide i had was to create my own makefile and include the one i would
like to parse:
Makefile.pso:
_______________________________
.include "Makefile"
*pass the relevant variables to my program* <-- how can i do this?
_______________________________
But if i do this make starts to build the application that "Makefile" is
for.
Does this make sense? :)
All help i appreciated.
// Fredrik Carlsson
_______________________________________________
Help-make mailing list
[email protected]
http://lists.gnu.org/mailman/listinfo/help-make
